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參數(shù)資料
| 型號： | MAX7329AWE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 100kHz |
| 電源電壓： | 2.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
MAX7328/MAX7329
Interrupts that occur during the acknowledge clock
pulse may be lost (or very short) due to the resetting of
the interrupt during this pulse. Each change of the I/Os
after resetting is detected and, after the next rising
clock edge, is transmitted as INT.
MAX7328/MAX7329 Initial Power-Up
On power-up, the power-up default states of the eight
I/O ports are high, and therefore, can be used as inputs
or outputs. The interrupt output INT is reset, and INT
goes high (high impedance if an external pullup resistor
is not fitted).
Serial Interface
Serial Addressing
The MAX7328/MAX7329 operate as slave devices that
send and receive data through an I2C-compatible,
2-wire interface. The interface uses a serial-data line
(SDA) and a serial-clock line (SCL) to achieve bidirec-
tional communication between master(s) and slave(s).
A master initiates all data transfers to and from the
MAX7328 or MAX7329, and generates the SCL clock
that synchronizes the data transfer (Figure 3).
The MAX7328 or MAX7329 SDA line operates as both
an input and an open-drain output. A pullup resistor,
I2C Port Expanders with Eight I/O Ports
6
_______________________________________________________________________________________
SCL
SDA
START CONDITION
R/W ACKNOWLEDGE
FROM SLAVE
SLAVE ADDRESS
S0
123
4
5
6
7
8
AA
A
P
P3
IOH
10
P3
OUTPUT
VOLTAGE
P3 PULLUP
OUTPUT CURRENT
IOHt
DATA TO PORT
Figure 2. Repeated Write Operation Showing Transient Pullup Current
SCL
SDA
tR
tF
tBUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION
START CONDITION
tSU, STO
tHD, STA
tSU, STA
tVD, DAT
tHD, DAT
tSU, DAT
tLOW
tHIGH
tHD, STA
Figure 3. 2-Wire Serial-Interface Timing Details
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