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參數(shù)資料
| 型號： | MAX7329AWE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 46 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 100kHz |
| 電源電壓： | 2.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 管件 |
typically 4.7k
, is required on SDA. The MAX7328 or
MAX7329 SCL line operates only as an input. A pullup
resistor, typically 4.7k
, is required on SCL if there are
multiple masters on the 2-wire interface, or if the master
in a single-master system has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 4) sent by a master, followed by the MAX7328
or MAX7329 7-bit slave address plus R/W bit, a register
address byte, one or more data bytes, and finally a
STOP condition (Figure 4).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 4).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 5).
Acknowledge
The acknowledge bit is a clocked ninth bit, which the
recipient uses to handshake receipt of each byte of
data (Figure 6). Thus, each byte transferred effectively
requires 9 bits. The master generates the ninth clock
pulse, and the recipient pulls down SDA during the
during the high period of the clock pulse. When the
master is transmitting to the MAX7328 or MAX7329, the
MAX7328 or MAX7329 generates the acknowledge bit
because the MAX7328 or MAX7329 is the recipient.
When the MAX7328 or MAX7329 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave Address
The MAX7328/MAX7329 have a 7-bit long slave
address (Figure 7). The eighth bit, following the 7-bit
slave address, is the R/W bit. It is low for a write com-
mand, high for a read command.
MAX7328/MAX7329
I2C Port Expanders with Eight I/O Ports
_______________________________________________________________________________________
7
SDA
SCL
START
CONDITION
STOP
CONDITION
SP
Figure 4. START and STOP Conditions
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 5. Bit Transfer
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGEMENT
START
CONDITION
SDA BY
RECEIVER
12
89
S
Figure 6. Acknowledge
SDA
SCL
A5
MSB
LSB
ACK
A4
A1
A6
A3
A0
A2
R/W
Figure 7. Slave Address
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX7329AWE+ | 功能描述:接口-I/O擴(kuò)展器 I2C Port Expander w/12 P-P Out & 4 I/O RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7329AWE+T | 功能描述:接口-I/O擴(kuò)展器 I2C Port Expander w/12 P-P Out & 4 I/O RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7329AWE-T | 功能描述:接口-I/O擴(kuò)展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX732C/D | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:+12V/+15V Step-Up Current-Mode Pwm Regulators |
| MAX732CPA | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 12/15V Step-Up RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
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