參數(shù)資料
型號(hào): MAX7300AGL
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 其它接口
英文描述: 2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or 28-Port I/O Expander
中文描述: SPECIALTY INTERFACE CIRCUIT, QCC40
封裝: 6 X 6 MM, 0.90 MM HEIGHT, MO-220, QFN-40
文件頁(yè)數(shù): 17/22頁(yè)
文件大小: 348K
代理商: MAX7300AGL
M
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
______________________________________________________________________________________
17
GPIO INPUT
CONDITIONING
P31
P30
P29
P28
P27
P26
P25
P24
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CLOCK PULSE WHEN WRITING CONFIGURATION REGISTER WITH M BIT SET
OR
CONFIGURATION REGISTER M BIT = 1
R
S
GPIO IN
GPIO/PORT OUT
CLOCK PULSE AFTER EACH READ ACCESS TO MASK REGISTER
IRQ STATUS STORED AS MSB OF MASK REGISTER
MASK REGISTER BIT 6
MASK REGISTER BIT 5
MASK REGISTER BIT 4
MASK REGISTER BIT 3
MASK REGISTER BIT 2
MASK REGISTER BIT 1
MASK REGISTER LSB
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO INPUT
CONDITIONING
GPIO/PORT
OUTPUT LATCH
IRQ
OUTPUT LATCH
Figure 10. Maskable GPIO Ports P24 to P31
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