
M
315MHz/433MHz ASK Superheterodyne
Receiver with AGC Lock
______________________________________________________________________________________
11
COMPONENT
L1
L2
L3
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
R1
X1
X2
VALUE FOR f
RF
= 433MHz
56nH
15nH
15nH
100pF
2pF
100pF
100pF
1500pF
220pF
470pF
0.47μF
220pF
0.01μF
0.01μF
15pF
15pF
5.1k
6.5984MHz
10.7MHz ceramic filter
VALUE FOR f
RF
= 315MHz
120nH
15nH
27nH
100pF
4pF
100pF
100pF
1500pF
220pF
470pF
0.47μF
220pF
0.01μF
0.01μF
15pF
15pF
5.1k
4.7547MHz
10.7MHz ceramic filter
DESCRIPTION
TOKO LL1608-FH
Murata LQP11A
Murata LQP11A
5%
±
0.1pF
5%
5%
10%
5%
5%
20%
10%
20%
20%
Depends on XTAL
Depends on XTAL
5%
—
Murata SFECV10.7 series
injection is required due to the on-chip image-rejection
architecture. The IF output is driven by a source follow-
er biased to create a driving-point impedance of 330
;
this provides a good match to the off-chip 330
ceram-
ic IF filter.
The IRSEL pin is a logic input that selects one of the
three possible image-rejection frequencies. When V
IRSEL
= 0V, the image rejection is tuned to 315MHz. V
IRSEL
=
V
DD5
/ 2 tunes the image rejection to 375MHz, and
V
IRSEL
= V
DD5
tunes the image rejection to 433MHz. The
IRSEL pin is internally set to V
DD5
/ 2 (image rejection at
375MHz) when it is left unconnected, thereby eliminating
the need for an external V
DD5
/ 2 voltage.
Phase-Locked Loop
The PLL block contains a phase detector, charge
pump, integrated loop filter, VCO, asynchronous 64x
clock divider, and crystal oscillator driver. Besides the
crystal, this PLL does not require any external compo-
nents. The VCO generates a low-side LO. The relation-
ship between the RF, IF, and reference frequencies is
given by:
where:
M = 1 (V
XTALSEL
= V
DD5
) or 2 (V
XTALSEL
= 0V)
To allow the smallest possible IF bandwidth (for best sen-
sitivity), minimize the tolerance of the reference crystal.
Intermediate Frequency and RSSI
The IF section presents a differential 330
load to pro-
vide matching for the off-chip ceramic filter. The six
internal AC-coupled limiting amplifiers produce an
overall gain of approximately 65dB, with a bandpass-fil-
ter-type response centered near the 10.7MHz IF fre-
quency with a 3dB bandwidth of approximately 10MHz.
The RSSI circuit demodulates the IF by producing a DC
output proportional to the log of the IF signal level, with
a slope of approximately 14.2mV/dB (see the
Typical
Operating Characteristics
).
Applications Information
Crystal Oscillator
The crystal oscillator in the MAX7033 is designed to
present a capacitance of approximately 3pF between
the XTAL1 and XTAL2. If a crystal designed to oscillate
with a different load capacitance is used, the crystal is
pulled away from its stated operating frequency, intro-
ducing an error in the reference frequency. Crystals
f
f
32
f
IF
M
REF
RF
×
=
-
Table
1. Component Values for Typical Application Circuit