參數(shù)資料
型號: MAX691A
廠商: Maxim Integrated Products, Inc.
英文描述: Microprocessor Supervisory Circuits(帶看門狗復(fù)位、片選和支持備用電池的復(fù)位器)
中文描述: 微處理器監(jiān)控電路
文件頁數(shù): 7/16頁
文件大?。?/td> 164K
代理商: MAX691A
M
Mic roproc essor S upervisory Circ uits
_______________________________________________________________________________________
7
______________________________________________________________Pin Desc ription
NAME
FUNCTION
1
VBATT
Battery-Backup Input. Connect to external battery or capacitor and charging circuit. If backup battery is not
used, connect to GND.
Output Supply Voltage. When V
CC
is greater than VBATT and above the reset threshold, V
OUT
connects to
V
CC
. When V
CC
falls below VBATT and is below the reset threshold, V
OUT
connects to VBATT. Connect a 0.1μF
capacitor from V
OUT
to GND. Connect V
OUT
to V
CC
if no backup battery is used.
Input Supply Voltage, 5V input.
Ground. 0V reference for all signals.
Battery On Output. When V
OUT
switches to VBATT, BATT ON goes high. When V
OUT
switches to V
CC,
BATT ON
goes low. Connect the base of a PNP through a current-limiting resistor to BATT ON for V
OUT
current require-
ments greater than 250mA.
2
V
OUT
PIN
3
4
V
CC
GND
8
OSC SEL
Oscillator Select. When OSC SEL is unconnected or driven high, the internal oscillator sets the reset delay and
watchdog timeout period. When OSC SEL is low, the external oscillator input (OSC IN) is enabled (see Table 1).
OSC SEL has a 10μA internal pull-up.
OUT
.
7
OSC IN
External Oscillator Input. When OSC SEL is unconnected or driven high, a 10μA pull-up connects from V
OUT
to
OSC IN, the internal oscillator sets the reset and watchdog timeout periods, and OSC IN selects between fast
and slow watchdog timeout periods. When OSC SEL is driven low, the reset and watchdog timeout periods may
be set either by a capacitor from OSC IN to ground or by an external clock at OSC IN (see Figure 3.)
6
–—O—W—L—N—
–—O—W—L—N—output goes low when V
CC
falls below the reset threshold. It returns high as soon as V
CC
rises above
the reset threshold.
5
BATT ON
13
–— IN
Chip-Enable Input. The input to chip-enable gating circuit. If –—IN is not used, connect –—IN to GND or V
Watchdog Output. If WDI remains high or low longer than the watchdog timeout period, –W——Ogoes low and reset
is asserted for the reset timeout period. –W——Oreturns high on the next transition at WDI. –W——Oremains high if
12
–— OUT
low when reset is asserted, –— OUT will stay low for 15μs or until –— IN is above the reset threshold. If CE IN is
11
WDI
Watchdog Input. WDI is a three-level input. If WDI remains either high or low for longer than the watchdog time-
sition at WDI. Leaving WDI unconnected disables the watchdog function. WDI connects to an internal voltage
Chip-Enable Output. –— OUT goes low only when –— IN is low and V
OUT
and GND, which sets it to mid-supply when left unconnected.
10
P——O
goes low. When PFI is not used, connect PFI to GND or V
This is an uncommitted comparator, and has no effect on any other internal circuitry.
9
PFI
16
RESET
RESET is an active-high output. It is open drain, and the inverse of –————.
15
–————
–WDI is unconnected.
falls below the reset threshold. –————will remain low typically for 200ms
after V
crosses the reset threshold on power-up.
14
–W——O
_______________Detailed Desc ription
–————–and RES ET Outputs
The MAX691A/MAX693A/MAX800L/MAX800M’s –————
and RESET outputs ensure that the μP (with reset
inputs asserted either high or low) powers up in a
known state, and prevents code-execution errors dur-
ing power-down or brownout conditions.
The –————output is active low, and typically sinks
3.2mA at 0.1V saturation voltage in its active state.
V
- 0.5V. RESET output is open drain, active high,
and typically sinks 3.2mA with a saturation voltage of
guaranteed to pull-down resistor on–————insures
CC
= 1V, and an
external 10k
that it wgoes below 1V, the gate drive to the –————
CC
down to GND (Figure 1).
As V
output switch reduces accordingly, increasing the
r
and the saturation voltage. The 10k
pull-down
resistor insures the parallel combination of switch plus
resistor is around 10k
and the output saturation volt-
age is below 0.4V while sinking 40μA. When using a
external pull-down resistor, the high state for
10k
CC
= 4.75V will be 4.5V typical.
For battery voltages
CC
from 0V to 5.5V.
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