參數(shù)資料
型號(hào)： MAX6892ETJ
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 電源管理
英文描述： Pin-Selectable, Octal/Hex/Quad, Power-Supply Sequencers/Supervisors
中文描述： 8-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC32
封裝： 5 X 5 MM, 0.80 MM HEIGHT, TQFN-32
文件頁(yè)數(shù)： 3/19頁(yè)
文件大小： 298K
代理商： MAX6892ETJ
M
Pin-Selectable, Octal/Hex/Quad, Power-Supply
Sequencers/Supervisors
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
IN1
= V
IN6
–V
IN8
= GND, V
IN2
–V
IN5
= 2.7V to 5.5V, WDI =
ENABLE
= GND, TH0–TH4 =
MARGIN
=
MR
= DBP, T
A
= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Notes 1 and 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SRT Default Timeout Threshold
V
SRT-DEF
V
SRT
≥
V
SRT-DEF
, selects reset default
timeout
1.1
1.25
1.5
V
SRT Adjustable Timeout
Threshold
V
SRT-ADJ
(Note 4)
0.95
1.0
1.05
V
SRT Adjustable Timeout
Discharge Threshold
V
SRT-DIS
(Note 5)
100
mV
SRT Adjustable Timeout Output
Low Discharge Current
I
SRT-DIS
V
SRT
= 0.3V
0.7
mA
PG_,
RESET
,
WDO
Output Low
V
OL
I
SINK
= 4mA, output asserted
0.4
V
PG_,
RESET
,
WDO
Output Initial
Pulldown Current
I
UV
V
CC
< V
UVLO
,
V
PG
_
,
RESET
,
WDO
= 0.8V
10
40
μA
PG_,
RESET
,
WDO
Output Open-
Drain Leakage Current
I
LKG
Output high impedance
-1
+1
μA
V
IL
0.6
MR
,
MARGIN
,
ENABLE
,
TH0–TH4, WDI Input Voltage
V
IH
1.4
V
MR
Input Pulse Width
T
MR
1
μs
MR
Glitch Rejection
MR
to
RESET
Delay
100
2
ns
μs
t
D-
MR
MR
to DBP Pullup Current
I
MR
V
MR
= 1.4V
5
10
15
μA
MARGIN
to DBP Pullup Current
I
MARGIN
V
MARGIN
= 1.4V
5
10
15
μA
ENABLE
to PG_ Delay
ENABLE
Pulldown Current
t
D-ENPG
200
10
ns
μA
V
ENABLE
= 0.6V
5
15
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