參數(shù)資料
型號: MAX6879ETE
廠商: Maxim Integrated Products, Inc.
英文描述: Dual J-K Flip-Flops With Preset And Clear 16-CDIP -55 to 125
中文描述: Dual-/Triple-Voltage,電源追蹤器/排序器/監(jiān)控
文件頁數(shù): 19/24頁
文件大?。?/td> 307K
代理商: MAX6879ETE
M
Dual-/Triple-Voltage, Power-Supply
Trackers/Sequencers/Supervisors
______________________________________________________________________________________
19
During fault conditions, an internal pulldown resistor
(100
) on OUT_ is enabled to help discharge load
capacitance (100
is connected for fast power-down
control).
Outputs
GATE_
The MAX6877/MAX6878/MAX6879 feature up to three
GATE_ outputs to drive up to three external n-channel
FET gates. The following conditions must be met before
GATE_ begins enhancing the external n-channel FET_:
1) All SET_ inputs (SET1–SET3) are above their 0.5V
thresholds.
2) At least one IN_ input or V
CC
is above the minimum
operating voltage (2.7V).
3) EN/
UV
> 1.25V.
At power-up mode, GATE_ voltages are enhanced by
control loops so that all OUT_ voltages track together at
a capacitor-adjusted slew rate. Each GATE_ is internal-
ly pulled up to 5V above its relative IN_ voltage to fully
enhance the external n-channel FET when power-up is
complete.
FAULT
The MAX6877/MAX6878/MAX6879 include an open-
drain, active-low tracking fault alarm output (
FAULT
).
FAULT
asserts low when a power-up phase is not com-
pleted within the specified fault period or if OUT_ volt-
ages are more than V
TRK_F
.
The fault time period (t
FAULT
) is set through the capaci-
tor at SLEW (C
SLEW
). Use the following formula to esti-
mate the fault timeout period:
t
FAULT
= 2.191 x 10
8
x C
SLEW
Power-supply tracking operation should be completed
within the selected fault timeout period (t
FAULT
). The
total tracking time is extended when the devices must
vary the control slew rate to allow slow supplies to
catch up. If the external FET is too small (RDS is too
high for the selected load current and IN_ source cur-
rent), the OUT_ voltage may never reach the control
ramp voltage. For a slew rate of 935V/s, a fault is sig-
naled if all outputs have not stabilized within 22ms. For
a slew rate of 93.5V/s, a fault is signaled if tracking
takes too long (more than 219ms).
During power-up, only the condition, OUT_ < ramp -
V
TRK
, is monitored in order to stop the ramp. However,
both conditions OUT < ramp - V
TRK_F
and OUT_ >
ramp + V
TRK_F
cause a fault. During power-down, only
the condition OUT > ramp + V
TRK
is checked in order
to stop the ramp. However, both conditions OUT_ <
ramp - V
TRK_F
and OUT_ > ramp + V
TRK_F
cause a
fault (see Figure 10). OUT1, OUT2, and OUT3 are
tracked within V
TRK_F
(mV) (power-up tracking and
power-down), and if they differ by more than 2 x V
TRK_F
a fault condition is asserted.
Retry time period (t
RETRY
) is defined as 16 x t
FAULT
. To
calculate the retry time period use the following formula:
t
RETRY
= 3.506 x 10
9
x C
SLEW
where t
RETRY
is in μs and C
SLEW
is in farads.
Autoretry and Latch-Off Functions (
LTCH
/RTR)
The MAX6877/MAX6878/MAX6879 feature latch-off or
autoretry modes to power-on again after a fault condi-
tion has been detected. Connect
LTCH
/RTR to ground
to set the latch-off mode. To select autoretry mode,
connect
LTCH
/RTR to ABP or leave unconnected.
250mV DOWN =
FAULT THRESHOLD
250mV DOWN =
FAULT THRESHOLD
125mV DOWN =
STOP RAMP THRESHOLD
125mV UP =
STOP RAMP THRESHOLD
250mV UP =
FAULT THRESHOLD
250mV UP =
FAULT THRESHOLD
REFERENCE RAMP
REFERENCE RAMP
POWER-UP
POWER-DOWN
Figure 10. Stop Ramp
FAULT
Window During Power-Up and Power-Down
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