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參數(shù)資料
| 型號： | MAX6875ETJ+ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors |
| 中文描述： | 4-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC32 |
| 封裝： | 7 X 7 MM, 0.80 MM HEIGHT, MO-220, TQFN-32 |
| 文件頁數(shù)： | 22/40頁 |
| 文件大小： | 337K |
| 代理商： | MAX6875ETJ+ |
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MAX6874/MAX6875
EEPROM-Programmable, Hex/Quad,
Power-Supply Sequencers/Supervisors
______________________________________________________________________________________
29
Block Write
The block write protocol allows the master device to
write a block of data (1 to 16 bytes) to the EEPROM or
to the register bank (see Figure 7). The destination
address must already be set by the send byte or write
byte protocol and the command code must be 83h. If
the number of bytes to be written causes the address
pointer to exceed 45h for the configuration register or
configuration EEPROM, the address pointer stays at
45h, overwriting this memory address with the remain-
ing bytes of data. The last data byte sent is stored at
register address 45h. If the number of bytes to be writ-
ten exceeds the address pointer FFh for the user EEP-
ROM, the address pointer loops back to 00h, and
continues writing bytes until all data is written. The
block write procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends the 8-bit command code for
block write (83h).
5) The addressed slave asserts an ACK on SDA.
6) The master sends the 8-bit byte count (1 to 16 bytes) N.
7) The addressed slave asserts an ACK on SDA.
8) The master sends 8 bits of data.
9) The addressed slave asserts an ACK on SDA.
10) Repeat steps 8 and 9 one time.
11) The master generates a stop condition.
Receive Byte
The receive byte protocol allows the master device to
read the register content of the MAX6874/MAX6875
(see Figure 7). The EEPROM or register address must
be preset with a send byte or write word protocol first.
Once the read is complete, the internal pointer increas-
es by one. Repeating the receive byte protocol reads
the contents of the next address. The receive byte pro-
cedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
read bit (high).
3) The addressed slave asserts an ACK on SDA.
4) The slave sends 8 data bits.
5) The master asserts a NACK on SDA.
6) The master generates a stop condition.
Block Read
The block read protocol allows the master device to
read a block of 16 bytes from the EEPROM or register
bank (see Figure 7). Read fewer than 16 bytes of data
by issuing an early STOP condition from the master, or
by generating a NACK with the master. The send byte
or write byte protocol predetermines the destination
address with a command code of 84h. The block read
procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends 8 bits of the block read command
(84h).
5) The slave asserts an ACK on SDA, unless busy.
6) The master generates a repeated start condition.
7) The master sends the 7-bit slave address and a
read bit (high).
8) The slave asserts an ACK on SDA.
9) The slave sends the 8-bit byte count (16).
10) The master asserts an ACK on SDA.
11) The slave sends 8 bits of data.
12) The master asserts an ACK on SDA.
13) Repeat steps 8 and 9 fifteen times.
14) The master generates a stop condition.
Address Pointers
Use the send byte protocol to set the register address
pointers before read and write operations. For the con-
figuration registers, valid address pointers range from
00h to 45h. Register addresses outside of this range
result in a NACK being issued from the MAX6874/
MAX6875. When using the block write protocol, the
address pointer automatically increments after each
data byte, except when the address pointer is already
at 45h. If the address pointer is already 45h, and more
data bytes are being sent, these subsequent bytes
overwrite address 45h repeatedly, leaving only the last
data byte sent stored at this register address.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX6875ETJ+ | 功能描述:監(jiān)控電路 EEPROM-Prog Quad Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6875ETJ+T | 功能描述:監(jiān)控電路 EEPROM-Prog Quad Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6875ETJ-T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6876ETX | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6876ETX+ | 功能描述:監(jiān)控電路 EEPROM-Prog Quad Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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