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參數資料
| 型號： | MAX6818EAP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 5/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SW DEBOUNCE 20-SSOP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 系列： | * |
| 應用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
Robust Switch Inputs
The switch inputs on the MAX6816/MAX6817/MAX6818
have overvoltage clamping diodes to protect against
damaging fault conditions. Switch input voltages
can safely swing ±25V to ground (Figure 3). Proprietary
ESD-protection structures protect against high
ESD encountered in harsh industrial environments,
membrane keypads, and portable applications.
They are designed to withstand ±15kV per the
IEC 1000-4-2 Air Gap Discharge Test and ±8kV per the
IEC 1000-4-2 Contact Discharge Test.
Since there are 63k
(typical) pullup resistors connect-
ed to each input, driving an input to -25V will draw
approximately 0.5mA (up to 4mA for eight inputs) from
the VCC supply. Driving an input to +25V will cause
approximately 0.32mA of current (up to 2.6mA for eight
inputs) to flow back into the VCC supply. If the total sys-
tem VCC supply current is less than the current flowing
back into the VCC supply, VCC will rise above normal
levels. In some low-current systems, a zener diode on
VCC may be required.
±15kV ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
assembly. The MAX6816/MAX6817/MAX6818 have
extra protection against static electricity. Maxim's engi-
neers have developed state-of-the-art structures to pro-
tect against ESD of ±15kV at the switch inputs without
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
tDP
IN1
OUT1
IN2
OUT2
CH
MAX6818 ONLY
20ms/div
20V
0V
-20V
4V
OUT
(2V/div)
IN
(20V/div)
0V
tEN
OUT NORMALLY
LOW
OUT NORMALLY
HIGH
OUT1–OUT8
1/2 VCC
EN
tPE
tPD
VOL + 0.5V
VOH - 0.5V
tPE
tPC
OUT1–OUT8
CH
Figure 2. Input Characteristics
Figure 3. Switch Input ±25V Fault Tolerance
Figure 4. MAX6818 P-Interface Timing Diagram
IN1
SW1
SW8
IN8
+VCC
P
0.1
F
OUT1
OUT8
EN
I/O
IRQ
D0
D7
CH
MAX6818
Figure 5. MAX6818 Typical P Interfacing Circuit
Maxim Integrated
5
MAX6816/MAX6817/MAX6818
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