參數(shù)資料
型號: MAX6738XKZD7-T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5
封裝: EIAJ, SC-70, 5 PIN
文件頁數(shù): 8/16頁
文件大小: 209K
代理商: MAX6738XKZD7-T
M
Low-Power Dual-/Triple-Voltage SC70 μP
Supervisory Circuits
8
_______________________________________________________________________________________
Pin Description
PIN
MAX6736
MAX6737
MAX6738
MAX6739
MAX6740
MAX6743
MAX6741
MAX6744
MAX6742
MAX6745
NAME
FUNCTION
1
1
1
1
1
RESET
Reset Output, Push-Pull or Open Drain Active Low.
RESET
changes from high to low when any monitored power-supply
input (V
CC
1, V
CC
2, RSTIN) drops below its selected reset
threshold. It remains low until all monitored power-supply
inputs exceed their selected reset thresholds for the V
CC
reset timeout period.
RESET
is forced low if
MR
is low for at
least the
MR
minimum input pulse width. It remains low for
the
MR
reset timeout period after
MR
goes high. The push-
pull output is referenced to V
CC
1. The MAX6736/MAX6738
open-drain outputs require an external pullup resistor. The
MAX6740/MAX6741/MAX6742 open-drain outputs have an
internal 50k
pullup resistor to V
CC
1 and provide a manual
reset function.
Ground
Manual Reset, Active Low. Pull low for at least
MR
minimum
input pulse width to force
RESET
low. Reset remains active
as long as
MR
is low and for the
MR
reset timeout period
after
MR
goes high. There is an internal 1.5k
pullup resistor
to V
CC
1.
2
2
2
2
2
GND
3
3
MR
4
4
4
V
CC
2
Voltage Input 1. Power supply and input for the secondary
μP voltage reset monitor.
4
3
RSTIN
Adjustable Reset Threshold Input.
RESET
is asserted when
RSTIN is below the internal 0.488V reference level. Set the
adjustable reset threshold with an external resistor-divider
network. Connect RSTIN to V
CC
1 if unused.
5
5
5
5
5
V
CC
1
Voltage Input 2. Power supply and input for the primary μP
voltage reset monitor.
4
PFI
Power-Fail Comparator Input.
PFO
is asserted when PFI is
below 0.488V.
PFO
is deasserted without any reset timeout
period when PFI goes above 0.488V. Connect PFI to an
external resistor network to set the desired monitor
threshold.
3
PFO
Power-Fail Comparator Output, Open Drain Active Low.
PFO
is asserted when PFI is below 0.488V.
3
POK1
V
CC
1 Power-OK Output, Open Drain Active High. POK1
remains low as long as V
CC
1 is below V
TH
1.
POK1 output
goes high after V
CC
1 exceeds V
TH
1 for the POK1 timeout
period. POK1 logic is independent of the
MR
or V
CC
2 inputs.
The output can be used to control V
CC
1-to-V
CC
2 supply
sequencing.
相關PDF資料
PDF描述
MAX6740XKL Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
MAX6740XKM Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
MAX6740XKR Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
MAX6740XKS Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
MAX6740XKT Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
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