參數(shù)資料
型號(hào): MAX6722
廠商: Maxim Integrated Products, Inc.
英文描述: Dual/Triple Ultra-Low-Voltage SOT23 レP Supervisory Circuits
中文描述: 雙/三路、超低電壓、SOT23封裝、微處理器監(jiān)控電路
文件頁(yè)數(shù): 9/19頁(yè)
文件大?。?/td> 418K
代理商: MAX6722
Detailed Description
Supply Voltages
The MAX6715
MAX6729 microprocessor (μP) supervi-
sory circuits maintain system integrity by alerting the μP
to fault conditions. These ICs are optimized for systems
that monitor two or three supply voltages. The output-
reset state is guaranteed to remain valid while either
V
CC
1 or V
CC
2 is above 0.8V.
Threshold Levels
Input voltage threshold level combinations are indicat-
ed by a two-letter code in the
Reset Voltage Threshold
Suffix Guide
(Table 1). Contact factory for availability of
other voltage threshold combinations.
Reset Outputs
The MAX6715
MAX6729 provides an active-low reset
output (
RST
) and the MAX6725/MAX6726 provides
both an active-high (RST) and an active-low reset out-
put (
RST
). RST,
RST
,
RST1
, and
RST2
are asserted
when the voltage at either V
CC
1 or V
CC
2 falls below the
voltage threshold level, RSTIN drops below threshold,
or
MR
is pulled low. Once reset is asserted it stays low
for the reset timeout period (see Table 2). If V
CC
1,
V
CC
2, or RSTIN goes below the reset threshold before
the reset timeout period is completed, the internal timer
M
Dual/Triple Ultra-Low-Voltage SOT23 μP
Supervisory Circuits
_______________________________________________________________________________________
9
Pin Description (continued)
PIN
MAX6715/
MAX6716
MAX6717/
MAX6718
MAX6719/
MAX6720
MAX6721/
MAX6722
MAX6723/
MAX6724
MAX6725/
MAX6726
MAX6727
MAX6728/
MAX6729
NAME
FUNCTION
4
PFO
Active-Low Power-Fail
Monitor Output, Open-
Drain or Push-Pull.
PFO
is
asserted low when PFI is
less than 0.626V.
PFO
deasserts without a reset
timeout period. Open-
drain outputs require an
external pullup resistor.
Push-pull outputs are
referenced to V
CC
1.
Active-High Reset
Output, Open-Drain or
Push-Pull. RST changes
from low to high when
V
CC
1 or V
CC
2 drops
below selected reset
thresholds, RSTIN is
below threshold,
MR
is
pulled low, or the
watchdog triggers a
reset. RST remains HIGH
for the reset timeout
period after V
CC
1/
V
CC
2/RSTIN exceed the
device reset thresholds,
MR
goes low to high, or
the watchdog triggers a
reset. Open-drain outputs
require an external pullup
resistor. Push-pull
outputs are referenced to
V
CC
1.
4
RST
相關(guān)PDF資料
PDF描述
MAX6723 Replaced by TPL9201 : Microcontroller Power Supply and Low-Side Driver 20-PDIP -40 to 125
MAX6724 Replaced by TPL9201 : Microcontroller Power Supply and Low-Side Driver 20-PDIP -40 to 125
MAX6725 Replaced by TPL9201 : Microcontroller Power Supply and Low-Side Driver 20-HTSSOP -40 to 125
MAX6726 Replaced by TPL9201 : Microcontroller Power Supply and Low-Side Driver 20-HTSSOP -40 to 125
MAX6727 Replaced by TPL9202 : Microcontroller Power Supply and Low-Side Driver 20-HTSSOP -40 to 125
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MAX6722AUTLTD2+T 功能描述:監(jiān)控電路 Dual uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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