參數(shù)資料
型號(hào): MAX5887EGK
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 3.3V, 14-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
中文描述: PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, 14-BIT DAC, QCC68
封裝: 10 X 10 MM, 0.9 MM HEIGHT, MO-220, QFN-68
文件頁數(shù): 8/18頁
文件大?。?/td> 982K
代理商: MAX5887EGK
M
3.3V, 14-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
8
_______________________________________________________________________________________
Detailed Description
Architecture
The MAX5887 is a high-performance, 14-bit, current-
steering DAC (Figure 1) capable of operating with clock
speeds up to 500MHz. The converter consists of sepa-
rate input and DAC registers, followed by a current-
steering circuit. This circuit is capable of generating
differential full-scale currents in the range of 2mA to
20mA. An internal current-switching network in combi-
nation with external 50
termination resistors convert
the differential output currents into a differential output
voltage with a peak-to-peak output voltage range of
0.1V to 1V. An integrated 1.2V bandgap reference, con-
trol amplifier, and user-selectable external resistor
determine the data converter’s full-scale output range.
Reference Architecture and Operation
The MAX5887 supports operation with the on-chip 1.2V
bandgap reference or an external reference voltage
source. REFIO serves as the input for an external, low-
impedance reference source, and as the output if the
DAC is operating with the internal reference. For stable
operation with the internal reference, REFIO should be
decoupled to AGND with a 0.1μF capacitor. Due to its
limited output drive capability, REFIO must be buffered
with an external amplifier, if heavier loading is required.
The MAX5887’s reference circuit (Figure 2) employs a
control amplifier, designed to regulate the full-scale
current I
OUT
for the differential current outputs of the
DAC. Configured as a voltage-to-current amplifier, the
output current can be calculated as follows:
I
OUT
= 32
I
REFIO
- 1LSB
I
OUT
= 32
I
REFIO
- (I
OUT
/ 2
14
)
where I
REFIO
is the reference output current (I
REFIO
=
V
REFIO
/R
SET
) and I
OUT
is the full-scale output current of
the DAC. Located between FSADJ and DACREF, R
SET
is the reference resistor, which determines the amplifi-
er’s output current for the DAC. See Table 1 for a matrix
of different I
OUT
and R
SET
selections.
PIN
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
63
64
65
66
67
68
NAME
B12N
B11P
B11N
B10P
B10N
B9P
B9N
B8P
B8N
B7P
B7N
B6P
B6N
B5P
B5N
B4P
B4N
B3P
B3N
B2P
B2N
FUNCTION
Complementary Data Bit 12
Data Bit 11
Complementary Data Bit 11
Data Bit 10
Complementary Data Bit 10
Data Bit 9
Complementary Data Bit 9
Data Bit 8
Complementary Data Bit 8
Data Bit 7
Complementary Data Bit 7
Data Bit 6
Complementary Data Bit 6
Data Bit 5
Complementary Data Bit 5
Data Bit 4
Complementary Data Bit 4
Data Bit 3
Complementary Data Bit 3
Data Bit 2
Complementary Data Bit 2
Pin Description (continued)
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