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    參數(shù)資料
    型號(hào): MAX5878
    廠商: Maxim Integrated Products, Inc.
    英文描述: 16-Bit, 250Msps, High-Dynamic-Performance, Dual DAC with LVDS Inputs
    中文描述: 16位、250Msps、高動(dòng)態(tài)性能、雙路DAC,LVDS輸入
    文件頁數(shù): 13/18頁
    文件大?。?/td> 511K
    代理商: MAX5878
    M
    16-Bit, 250Msps, High-Dynamic-Performance,
    Dual DAC with LVDS Inputs
    ______________________________________________________________________________________
    13
    SELIQP
    CLKP-CLKN
    DATA
    IN
    I0
    Q2
    I2
    Q1
    I1
    I3
    Q3
    Q0
    t
    S
    t
    H
    OUTI
    OUTQ
    t
    PD
    I0 - 5
    I0 - 4
    I0 - 2
    I0 - 3
    I0 - 6
    Q0 - 6
    Q0 - 5
    Q0 - 4
    Q0 - 3
    Q0 - 2
    SELIQN
    Figure 4. Timing Diagram
    Data Timing Relationship
    Figure 4 displays the timing relationship between digital
    LVDS data, clock, and output signals. The MAX5878
    features a 2.0ns hold, a -1.2ns setup, and a 1.1ns prop-
    agation delay time. A nine (eight)-clock-cycle latency
    exists between CLKP/CLKN and OUTIP/OUTIN
    (OUTQP/OUTQN).
    LVDS-Compatible Digital Inputs
    (B15P/B15N–B0P/B0N, XORP, XORN,
    SELIQP, SELIQN)
    The MAX5878 latches B15P/N–B0P/N, XORP/N, and
    SELIQP/N data on the rising edge of the clock. A logic-
    high signal on SELIQP and a logic-low signal on
    SELIQN directs data onto the I-DAC inputs. A logic-low
    signal on SELIQP and a logic-high signal on SELIQN
    directs data onto the Q-DAC inputs.
    The MAX5878 features LVDS receivers on the bus input
    interface with internal 110
    termination resistors. See
    Figure 5. XORP and XORN are not internally terminated.
    These LVDS inputs (B15P/N–B0P/N) allow for a low differ-
    ential voltage swing with low constant power consump-
    tion. A 1.25V common-mode level and 250mV differential
    input swing can be applied to the B15P/N–B0P/N,
    XORP/N, and SELIQP/N inputs.
    The MAX5878 includes LVDS-compatible exclusive-OR
    inputs (XORP, XORN). Input data (all bits) is compared
    with the bits applied to XORP and XORN through exclu-
    sive-OR gates. Setting XORP high and XORN low inverts
    the input data. Setting XORP low and XORN high leaves
    the input data noninverted. By applying a previously
    encoded pseudo-random bit stream to the data input
    and applying decoding to XORP/XORN, the digital input
    data can be decorrelated from the DAC output, allowing
    for the troubleshooting of possible spurious or harmonic
    distortion degradation due to digital feedthrough on the
    PC board. If XOR functionality is not required, connect
    XORP to GND and XORN to DV
    DD1.8
    .
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
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    MAX5878EGK-TD 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube