參數(shù)資料
型號(hào): MAX5877EGK+D
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 8/19頁(yè)
文件大?。?/td> 0K
描述: IC DAC 14BIT DUAL 250MSPS 68-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
設(shè)置時(shí)間: 14ns
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 331mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 68-QFN 裸露焊盤(10x10)
包裝: 管件
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 250M
MAX5877
14-Bit, 250Msps, High-Dynamic-Performance,
Dual DAC with LVDS Inputs
16
______________________________________________________________________________________
The analog and digital power-supply inputs AVDD3.3,
AVCLK, and DVDD3.3 allow a +3.135V to +3.465V sup-
ply voltage range. The analog and digital power-supply
inputs AVDD1.8 and DVDD1.8 allow a +1.71V to +1.89V
supply voltage range.
The MAX5877 is packaged in a 68-pin QFN-EP pack-
age, providing greater design flexibility and optimized
DAC AC performance. The EP enables the use of nec-
essary grounding techniques to ensure highest perfor-
mance operation. Thermal efficiency is not the key
factor, since the MAX5877 features low-power opera-
tion. The exposed pad ensures a minimum inductance
ground connection between the DAC and the PCB’s
ground layer.
The data converter die attaches to an EP lead frame
with the back of this frame exposed at the package bot-
tom surface, facing the PCB side of the package. This
allows for a solid attachment of the package to the PCB
with standard infrared reflow (IR) soldering techniques.
A specially created land pattern on the PCB, matching
the size of the EP (6mm x 6mm), ensures the proper
attachment and grounding of the DAC (refer to the
MAX5878 EV kit). Designing vias into the land area and
implementing large ground planes in the PCB design
allow for the highest performance operation of the DAC.
Use an array of at least 4 x 4 vias (
≤ 0.3mm diameter
per via hole and 1.2mm pitch between via holes) for this
68-pin QFN-EP package. Connect the MAX5877
exposed paddle to GND. Vias connect the land pattern
to internal or external copper planes to spread heat. Use
as many vias as possible to the ground plane to mini-
mize inductance.
Static Performance Parameter Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from either a best straight-line fit
(closest approximation to the actual transfer curve) or
a line drawn between the end points of the transfer
function, once offset and gain errors have been
nullified. For a DAC, the deviations are measured at
every individual step.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an actu-
al step height and the ideal value of 1 LSB. A DNL error
specification of less than 1 LSB guarantees a monotonic
transfer function.
Offset Error
The offset error is the difference between the ideal and
the actual offset current. For a DAC, the offset point is the
average value at the output for the two midscale digital
input codes with respect to the full scale of the DAC. This
error affects all codes by the same amount.
Gain Error
A gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve, after
nullifying the offset error. This error alters the slope of the
transfer function and corresponds to the same percent-
age error in each step.
MAX5877
14
OUTIP/OUTQP
OUTIN/OUTQN
DATA13–DATA0
GND
25
50
25
OUTP
OUTN
Figure 8. Differential Output Configuration
MAX5877
14
OUTIP/OUTQP
OUTIN/OUTQN
DATA13–DATA0
0.1
F
AVDD1.8
DVDD1.8
0.1
F
0.1
F
0.1
F
AVDD3.3
DVDD3.3
0.1
F
AVCLK
BYPASSING—DAC LEVEL
*BYPASS EACH POWER-SUPPLY PIN INDIVIDUALLY.
Figure 9. Recommended Power-Supply Decoupling and
Bypassing Circuitry
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