參數(shù)資料
型號(hào): MAX5821LEUA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC
中文描述: SERIAL INPUT LOADING, 4 us SETTLING TIME, 10-BIT DAC, PDSO8
封裝: MINIATURE, MICRO MAX PACKAGE-8
文件頁(yè)數(shù): 11/13頁(yè)
文件大?。?/td> 419K
代理商: MAX5821LEUA
impedance. Bypass V
DD
with a 0.1μF capacitor to
ground as close to the device as possible.
Chip Information
TRANSISTOR COUNT: 11,186
PROCESS: BiCMOS
M
Dual, 10-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
______________________________________________________________________________________
11
SERIAL DATA INPUT
C0
D9
C3
C2
C1
D8
D7
D6
FUNCTION
0
0
0
0
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC A input and DAC registers with new data.
Contents of DAC B input registers are transferred to the
DAC register. All outputs are updated.
0
0
0
1
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC B input and DAC registers with new data.
Contents of DAC A input registers are transferred to the
DAC register. All outputs are updated.
0
1
0
0
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC A input register with new data. DAC outputs
remain unchanged.
0
1
0
1
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC B input register with new data. DAC outputs
remain unchanged.
1
0
0
0
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Data in all input registers is transferred to respective DAC
registers. All DAC outputs are updated simultaneously.
New data is loaded into DAC A input register.
1
0
0
1
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Data in all input registers is transferred to respective DAC
registers. All DAC outputs are updated simultaneously.
New data is loaded into DAC B input register.
1
1
0
0
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load all DACs with new data and update all DAC outputs
simultaneously. Both input and DAC registers are updated
with new data.
1
1
0
1
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load all input registers with new data. DAC outputs
remain unchanged.
1
1
1
0
X
X
X
X
Update all DAC outputs simultaneously. Device ignores
D9
D6. Do not send the data byte.
1
1
1
1
0
0
0
0
Extended command mode. The next word writes to the
power-down registers (
Extended Command Mode
).
1
1
1
1
0
0
0
1
Read DAC A data. The device expects an S
r
condition
followed by an address word with R/
W
= 1.
1
1
1
1
0
0
1
0
Read DAC B data. The device expects an S
r
condition
followed by an address word with R/
W
= 1.
Table 3. Command Byte Definitions
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