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參數(shù)資料
| 型號： | MAX5812PEUT |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | 12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC |
| 中文描述： | SERIAL INPUT LOADING, 4 us SETTLING TIME, 12-BIT DAC, PDSO6 |
| 封裝： | MINIATURE, SOT-23, 6 PIN |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 268K |
| 代理商： | MAX5812PEUT |
M
12-Bit Low-Power, 2-Wire, Serial
Voltage-Output DAC
_______________________________________________________________________________________
7
Detailed Description
The MAX5812 is a 12-bit, voltage-output DAC with an
I
2
C/SMBus-compatible 2-wire interface. The device con-
sists of a serial interface, power-down circuitry, input
and DAC registers, a 12-bit resistor string DAC, unity-
gain output buffer, and output resistor network. The seri-
al interface decodes the address and control bits,
routing the data to either the input or DAC register. Data
can be directly written to the DAC register immediately
updating the device output, or can be written to the
input register without changing the DAC output. Both
registers retain data as long as the device is powered.
DAC Operation
The MAX5812 uses a segmented resistor string DAC
architecture, which saves power in the overall system
and guarantees output monotonicity. The MAX5812
’
s
input coding is straight binary with the output voltage
given by the following equation:
where N = 12(bits), and D = the decimal value of the
input code (0 to 4095).
Output Buffer
The MAX5812 analog output is buffered by a precision
unity-gain follower that slews 0.5V/μs. The buffer output
swings rail-to-rail and is capable of driving 5k
in paral-
lel with 200pF. The output settles to ±0.5LSB within 4μs.
Power-On Reset
The MAX5812 features an internal power-on-reset
(POR) circuit that initializes the device upon power-up.
The DAC registers are set to zero-scale and the device
is powered down with the output buffer disabled and
the output pulled to GND through the 100k
termina-
tion resistor. Following power-up, a wake-up command
must be initiated before conversions are performed.
Power-Down Modes
The MAX5812 has three software-controlled, low-
power, power-down modes. All three modes disable
the output buffer and disconnect the DAC resistor
string from V
DD
, reducing supply current draw to
300nA. In power-down mode 0, the device output is
high impedance. In power-down mode 1, the device
output is internally pulled to GND by a 1k
termination
resistor. In power-down mode 2, the device output is
internally pulled to GND by a 100k
termination resis-
tor. Table 1 shows the power-down mode command
words.
Upon wake-up, the DAC output is restored to its previ-
ous value. Data is retained in the input and DAC regis-
ters during power-down mode.
Digital Interface
The MAX5812 features an I
2
C/SMBus-compatible
2-wire interface consisting of a serial data line (SDA)
V
V
D
OUT
REF
N
=
×
( )
2
Pin Description
PIN
1
2
3
4
5
6
NAME
V
DD
GND
SDA
SCL
ADD
OUT
FUNCTION
Power Supply and DAC Reference Input
Ground
Bidirectional Serial Data I/O
Serial Clock Line
Address Select. A logic high sets the address LSB to 1; a logic low sets the address LSB to 0.
Analog Output
Table 1. Power-Down Command Bits
POWER-DOWN
COMMAND BITS
PD1
0
0
1
1
PD0
0
1
0
1
MODE/FUNCTION
Power-up device. DAC output restored to previous value.
Power-down mode 0. Powers down device with output floating.
Power-down mode 1. Powers down device with output terminated with 1k
to GND.
Power-down mode 2. Powers down device with output terminated with 100k
to GND.
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