參數(shù)資料
型號: MAX5733ACTN
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 32-Channel, 16-Bit, Voltage-Output DACs with Serial Interface
中文描述: SERIAL INPUT LOADING, 20 us SETTLING TIME, 16-BIT DAC, QCC56
封裝: 8 X 8 MM, 0.80 MM HEIGHT, MO-220, QFN-56
文件頁數(shù): 23/26頁
文件大?。?/td> 451K
代理商: MAX5733ACTN
M
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
______________________________________________________________________________________
23
Read-Data Format
The MAX5732–MAX5735 support daisy-chain connec-
tions of multiple devices. The default (power-up) config-
uration for the MAX5732–MAX5735 assumes that the
device may be part of a daisy chain of devices. DOUT
follows DIN after 32 clock cycles. For a read command,
DOUT provides read data (instead of the data value
shifted in) in the next cycle following a
CS
rising edge.
Figures 5 and 6 show examples of daisy-chain
data sequences.
Shutdown Mode
The MAX5732–MAX5735 feature a software-controlled
low-power shutdown mode. When bit 11 of the configu-
ration register is a logic high, the analog section of the
device is disabled, and the outputs go high impedance.
In shutdown, supply current is reduced to 50μA. Data
stored in the DAC and input registers is retained, and
the device outputs return to their previous values when
the device is brought out of shutdown. The serial inter-
face remains active while the device is in shutdown.
Power-Up State
The MAX5732–MAX5735 monitor the four power supplies
and maintain the output buffers in a known state until suffi-
cient voltage is available to ensure that no output glitches
occur. Once the minimum voltage threshold has been
passed, the device outputs come up in the clear state (all
outputs = 0). For proper power sequencing, V
SS
must be
applied first. Power sequencing is not necessary if V
SS
is
connected to AGND.
CONTROLLER
DEVICE
DIN
SCLK
CS
DOUT
1 OR 0
MAX573_
DSP
Figure 7. Stand-Alone Configuration
CONTROLLER
DEVICE
DIN
SCLK
CS
DOUT
1 OR 0
1 OR 0
1 OR 0
MAX573_
DIN
SCLK
CS
DOUT
MAX573_
DIN
SCLK
CS
DOUT
MAX573_
DSP
DSP
DSP
Figure 8. Example of a Parallel Configuration with Read-Back
C1
C2
C0 A5 A4 A3 A2
A1 A0 Sp Sp
Sp Sp Sp Sp Sp D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D15 D14 D13 D12 D11 D10 D9 D8 D7
D6 D5 D4 D3 D2 D1 D0
DIN(0)
SCLK
CS (
μ
C)
CS (DSP)
DOUT(0)
OR
Figure 9. Read Data Timing When Not Daisy Chained
相關(guān)PDF資料
PDF描述
MAX5734ACTN 32-Channel, 16-Bit, Voltage-Output DACs with Serial Interface
MAX5735ACTN 32-Channel, 16-Bit, Voltage-Output DACs with Serial Interface
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