參數(shù)資料
型號: MAX5721AUA+
廠商: Maxim Integrated Products
文件頁數(shù): 3/14頁
文件大?。?/td> 0K
描述: IC DAC 10BIT DUAL LP SER 8-UMAX
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 50
設(shè)置時間: 4µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設(shè)備封裝: 8-uMAX
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): *
產(chǎn)品目錄頁面: 1398 (CN2011-ZH PDF)
MAX5721
10-Bit, Low-Power, Dual, Voltage-Output
DAC with Serial Interface
______________________________________________________________________________________
11
CONTROL
DATA BITS
C3
C2
C1
C0
D9–D0
S1–S0
DAC
FUNCTION
00
XX
A
Input register transparent, data shifted directly to DAC register, OUTA updated
00
01
XX
B
Input register transparent, data shifted directly to DAC register, OUTB updated
01
00
XX
A
Data shifted to input register, OUTA unchanged
01
XX
B
Data shifted to input register, OUTB unchanged
10
00
XX
A
Shift data from input register to DAC register, OUTA updated
10
01
XX
B
Shift data from input register to DAC register, OUTB updated
11
00
XX
A-B
Input registers transparent, data shifted directly to DAC registers, OUTA and
OUTB updated
11
01
XX
A-B
Data shifted to input registers, OUTA and OUTB unchanged
11
10
XX
A-B
Shift data from input registers to DAC registers, OUTA and OUTB updated
X = Don’t Care
Table 2. Serial-Interface Programming Commands
DAC_
REF
VDD
OUT_
GND
IN
OUT
GND
MAX6050
MAX5721
+2.7V to +5.5V
Figure 3. Typical Operating Circuit, Unipolar Output
DAC_
MAX5721
REF
V-
V+
VOUT
R1
R2
OUT_
R1 = R2
VDD
GND
+2.7V to +5.5V
Figure 4. Bipolar Output Circuit
Applications Information
Unipolar Output
The typical application circuit (Figure 3) shows the
MAX5721 configured for a unipolar output, where the
output voltages and the reference inputs have the
same polarity. Table 3 lists the unipolar output codes.
Bipolar Output
The MAX5721 can be configured for bipolar operation
using a dual supply op amp (Figure 4). The transfer
function for bipolar operation is:
where DB is the decimal value of the DACs binary input
code. Table 4 shows digital codes (offset binary) and
corresponding output voltages for the circuit in Figure 4.
Power Supply and Layout Considerations
Careful PC board layout is important for optimal system
performance. To reduce noise injection and digital feed-
through, keep analog and digital signals separate.
Ensure that that the return path from GND to the supply
ground is short and low impedance. Use a ground
plane. Bypass VDD to GND with a 0.1F capacitor as
close as possible to VDD.
VV
2D
1024
OUT
REF
=
1
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