參數(shù)資料
型號(hào)： MAX5582
廠商： Maxim Integrated Products, Inc.
英文描述： Buffered. Fast-Settling. Quad. 12-/10-/8-Bit. Voltage-Output DACs
中文描述： 帶緩沖、快速建立、四通道、12/10/8位、電壓輸出DAC
文件頁(yè)數(shù)： 10/16頁(yè)
文件大小： 172K
代理商： MAX5582
M
+2.5V to +5.5V, Low-Power, S ingle/Dual,
8-Bit Voltage-Output DACs in μMAX Pac kage
10
______________________________________________________________________________________
Table 2. MAX548A Serial-Interface Programming Commands (continued)
COMMANDS FOR POWERING DOWN
X
1
X
0
X
1
0
CONTROL BYTE
Loaded First
C2
UB3
8-Bit DAC Data
X
Load DAC B input register and power down DAC
B. DAC A registers unchanged.
X
X
1
X
0
X
1
1
8-Bit DAC Data
X
Load both DAC input registers and power down
both DACs. Both DAC registers unchanged
X
X
1
X
1
0
1
0
8-Bit DAC Data
X
Load DAC B input register, power down DAC B,
and update both DAC registers. DAC A input
register unchanged.
X
X = Don’t care
X
1
X
1
0
0
1
8-Bit DAC Data
X
Load DAC A input register, power down DAC A,
and update both DAC registers. DAC B input
register unchanged.
X
X
1
X
0
X
0
1
8-Bit DAC Data
X
Load DAC A input register and power down DAC
A. DAC B registers unchanged.
X
X
1
X
1
0
1
1
8-Bit DAC Data
X
Load both DAC input registers, power down both
DACs, and update both DAC registers.
X
X
1
X
1
1
0
1
8-Bit DAC Data
0
Load DAC A input register, power down
DAC A, and update both DAC registers. DAC B
input register unchanged.
X
X
1
X
1
1
1
0
8-Bit DAC Data
0
Load DAC B input register, power down
DAC B, and update both DAC registers. DAC A
input register unchanged.
X
X
1
X
1
1
1
1
8-Bit DAC Data
0
Load both DAC input registers and power down
both DACs. Update both DAC registers.
X
X
1
X
1
1
0
1
8-Bit DAC Data
1
Load DAC A input register and power down DAC
A. While powered down, on
LDAC
’s falling edge,
update both DAC registers. DAC B input register
unchanged.
X
X
1
X
1
1
1
0
8-Bit DAC Data
1
Load DAC B input register and power down DAC
B. While powered down, on
LDAC
’s falling edge,
update both DAC registers. DAC A input register
unchanged.
X
X
1
X
1
1
1
1
8-Bit DAC Data
1
Load both DAC input registers and power down
both DACs. While powered down, on
LDAC
’s
falling edge, update both DAC registers.
X
COMMAND
(Commands executed on
CS
’s rising edge)
LDAC
DATA BYTE
Loaded Last
D7........D0
Pin 6
UB1
COMMANDS POWERING DOWN AND LOADING INPUT REGISTER(S) ONLY
A0
A1
C0
C1
UB2
COMMANDS POWERING DOWN AND UPDATING DAC REGISTER(S)
COMMANDS POWERING DOWN AND UTILIZING THE ASYNCHRONOUS LOAD FUNCTION
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