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參數(shù)資料
| 型號： | MAX5547ETA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DUAL 8-TDFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時間： | 10µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-TDFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | * |
MAX5547
Dual, 10-Bit, Current-Sink Output DAC
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, VGND = 0V, external reference = +2.5V, output voltage = +2.0V, TA = -40°C to +85°C. Typical values are at
VDD = +3.0V, and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING CHARACTERISTICS (see Figure 1)
SCLK Clock Period
tCP
100
ns
SCLK Pulse-Width High
tCH
40
ns
SCLK Pulse-Width Low
tCL
40
ns
CS Fall to SCLK Fall Setup Time
tCSS
25
ns
SCLK Fall to
CS Rise Hold Time
tCSH
50
ns
DIN to SCLK Fall Setup Time
tDS
40
ns
DIN to SCLK Fall Hold Time
tDH
0ns
CS Pulse-Width High
tCSW
100
ns
Note 1: Devices are 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 2: INL linearity is from code 48 to code 1023.
Note 3: Specification based on characterization data. Not production tested.
Note 4: Guaranteed by design. Not production tested.
Note 5: The DACs continue to operate at currents lower than 50A on the 1.2mA range and 150A on the 3.6mA range. However,
performance is not guaranteed at these low currents. A code of all zeros has a nominal output current of 0A.
Note 6: Compliance voltage range is defined as the range where the output current is -2 LSB of its value at VOUT = +1V.
Note 7: Settling time is measured from 0.25 x full scale to 0.75 x full scale.
Note 8: The device draws higher supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (VGND +
0.5V). See Supply Current vs. Digital Input Voltage in the
Typical Operating Characteristics.
Typical Operating Characteristics
(VDD = +3.0V, VGND = 0V, external reference = +2.5V, TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. DIGITAL INPUT CODE (1.2mA SETTING)
MAX5547
toc01
DIGITAL INPUT CODE
INL
(LSB)
768
512
256
-3
-2
-1
0
1
2
3
4
-4
0
1024
-4
-3
-2
-1
0
1
2
3
4
0
256
512
768
1024
INTEGRAL NONLINEARITY
vs. DIGITAL INPUT CODE (3.6mA SETTING)
MAX5547
toc02
DIGITAL INPUT CODE
INL
(LSB)
-1.00
-0.75
-0.50
-0.25
0
0.25
0.50
0.75
1.00
0
256
512
768
1024
DIFFERENTIAL NONLINEARITY
vs. DIGITAL INPUT CODE (1.2mA SETTING)
MAX5547
toc03
DIGITAL INPUT CODE
DNL
(LSB)
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