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參數資料
| 型號： | MAX5544ESA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 8/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 5V SERIAL 8-SOIC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 設置時間： | 1µs |
| 位數： | 14 |
| 數據接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 1.5mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸出數目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | * |
The external buffer amplifier’s gain-bandwidth product
is important because it increases the settling time by
adding another time constant to the output response.
The effective time constant of two cascaded systems,
each with a single time-constant response, is approxi-
mately the root square sum of the two time constants.
The DAC output’s time constant is 1s / 10.4 = 96ns,
ignoring the effect of additional capacitance. If the time
constant of an external amplifier with 1MHz bandwidth
is 1 / 2
π (1MHz) = 159ns, then the effective time con-
stant of the combined system is:
This suggests that the settling time to within 1/2LSB of
the final output voltage, including the external buffer
amplifier, will be approximately 10.4 186ns = 1.93s.
Digital Inputs and Interface Logic
The digital interface for the 14-bit DAC is based on a 3-
wire standard that is SPI/QSPI/MICROWIRE compati-
ble. The three digital inputs (CS, DIN, and SCLK) load
the digital input data serially into the DAC.
All of the digital inputs include Schmitt-trigger buffers to
accept slow-transition interfaces. This means that opto-
couplers can interface directly to the MAX5544 without
additional external logic. The digital inputs are TTL/
CMOS-logic compatible.
Unipolar Configuration
Figure 3 shows the MAX5544 configured for unipolar
operation with an external op amp. The op amp is set for
unity gain, and Table 1 shows the codes for this circuit.
Power-Supply Bypassing and
Ground Management
For optimum system performance, use PC boards with
separate analog and digital ground planes. Wire-wrap
boards are not recommended. Connect the two ground
planes together at the low-impedance power-supply
source. Connect DGND and AGND together at the IC.
The best ground connection can be achieved by con-
necting the DAC’s DGND and AGND pins together and
connecting that point to the system analog ground
plane. If the DAC’s DGND is connected to the system
digital ground, digital noise may get through to the
DAC’s analog portion.
Bypass VDD with a 0.1F ceramic capacitor connected
between VDD and AGND. Mount it with short leads
close to the device. Ferrite beads can also be used to
further isolate the analog and digital power supplies.
96ns
159ns
186ns
22
() +()
=
Figure 3. Typical Operating Circuit
0V
0000 0000 0000 00(00)
VREF (1 / 16,834)
0000 0000 0000 01(00)
VREF (8192 / 16,384) = 1/2VREF
1000 0000 0000 00(00)
VREF (16,383 / 16,384)
1111 1111 1111 11(00)
ANALOG OUTPUT, VOUT
MSB
LSB
DAC LATCH CONTENTS
Table 1. Unipolar Code Table
TRANSISTOR COUNT: 2209
SUBSTRATE CONNECTED TO DGND
Chip Information
MAX5544
MAX495
DGND
VDD
REF
OUT
SCLK
DIN
CS
AGND
0.1
F
0.1
F
+5V
+2.5V
EXTERNAL OP AMP
MC68XXXX
PCS0
MOSI
SCLK
UNIPOLAR
OUT
10
F
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX5544
Low-Cost, +5V, Serial-Input,
Voltage-Output, 14-Bit DAC
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