• 參數(shù)資料
    型號(hào): MAX5523EUA+
    廠商: Maxim Integrated Products
    文件頁(yè)數(shù): 8/23頁(yè)
    文件大小: 0K
    描述: IC DAC 10BIT DUAL ULP 8-UMAX
    產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
    Obsolescence Mitigation Program
    標(biāo)準(zhǔn)包裝: 50
    設(shè)置時(shí)間: 660µs
    位數(shù): 10
    數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
    轉(zhuǎn)換器數(shù)目: 2
    電壓電源: 單電源
    功率耗散(最大): 471mW
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
    供應(yīng)商設(shè)備封裝: 8-uMAX
    包裝: 管件
    輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
    采樣率(每秒): *
    產(chǎn)品目錄頁(yè)面: 1397 (CN2011-ZH PDF)
    Power Modes
    The MAX5522–MAX5525 feature two power modes to
    conserve power during idle periods. In normal opera-
    tion, the device is fully operational. In shutdown mode,
    the device is completely powered down, including the
    internal voltage reference in the MAX5523/MAX5525.
    The MAX5523/MAX5525 also offer a standby mode in
    which all circuitry is powered down except the internal
    voltage reference. Standby mode keeps the reference
    powered up while the remaining circuitry is shut down,
    allowing it to be used as a system reference. It also
    helps reduce the wake-up delay by not requiring the ref-
    erence to power up when returning to normal operation.
    Shutdown Mode
    The MAX5522–MAX5525 feature a software-program-
    mable shutdown mode that reduces the supply current
    and the interface input-current to 0.18A (max). Writing
    an input control word with control bits C[3:0] = 1110
    (Table 2) places the device in shutdown mode. In shut-
    down, the MAX5522/MAX5524 reference input and DAC
    output buffers go high impedance. Placing the MAX5523/
    MAX5525 into shutdown turns off the internal reference
    and the DAC output buffers go high impedance. The seri-
    al interface still remains active for all devices.
    Table 2 shows several commands that bring the
    MAX5522–MAX5525 back to normal operation. The
    power-up time from shutdown is required before the
    DAC outputs are valid.
    Note: For the MAX5523/MAX5525, standby mode can-
    not be entered directly from shutdown mode. The
    device must be brought into normal operation first
    before entering standby mode.
    Standby Mode (MAX5523/MAX5525 Only)
    The MAX5523/MAX5525 feature a software-program-
    mable standby mode that reduces the typical supply
    current to 3A (max). Standby mode powers down all
    circuitry except the internal voltage reference. Place
    the device in standby mode by writing an input control
    word with control bits C[3:0] = 1100 (Table 2). The
    internal reference and serial interface remain active
    while the DAC output buffers go high impedance.
    For the MAX5523/MAX5525, standby mode cannot be
    entered directly from shutdown mode. The device must
    be brought into normal operation first before entering
    standby mode. To enter standby from shutdown, issue
    the command to return to normal operation followed
    immediately by the command to go into standby.
    Table 2 shows several commands that bring the
    MAX5523/MAX5525 back to normal operation. When
    transitioning from standby mode to normal operation,
    only the DAC power-up time is required before the DAC
    outputs are valid.
    Reference Input
    The MAX5522/MAX5524 accept a reference with a volt-
    age range extending from 0 to VDD. The output voltage
    (VOUT) is represented by a digitally programmable volt-
    age source as:
    VOUT = (VREF x N / 256) x gain
    where N is the numeric value of the DAC’s binary input
    code (0 to 1023), VREF is the reference voltage, gain is
    the externally set voltage gain for the MAX5524, and
    gain is one for the MAX5522.
    In shutdown mode, the reference input enters a high-
    impedance state with an input impedance of 2.5G
    (typ).
    Reference Output
    The MAX5523/MAX5525 internal voltage reference is
    software configurable to one of four voltages. Upon
    power-up, the default reference voltage is 1.214V.
    Configure the reference voltage using D8 and D9 data
    bits (Table 3) when the control bits are as follows C[3:0]
    = 1100, 1101, or 1110 (Table 2). VDD must be kept at a
    minimum of 200mV above VREF for proper operation.
    MAX5522–MAX5525
    Dual, Ultra-Low-Power,
    10-Bit, Voltage-Output DACs
    16
    ______________________________________________________________________________________
    Table 3. Reference Output Voltage
    Programming
    D9
    D8
    REFERENCE VOLTAGE (V)
    0
    1.214
    0
    1
    1.940
    1
    0
    2.425
    1
    3.885
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