參數(shù)資料
型號: MAX5480AEEE+T
廠商: Maxim Integrated Products
文件頁數(shù): 5/6頁
文件大?。?/td> 0K
描述: IC DAC 8BIT PARALLEL 16-QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 400ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極;2 電壓,單極;2 電壓,雙極
采樣率(每秒): *
MAX5480
8-Bit Parallel DAC in
QSOP-16 Package
_______________________________________________________________________________________
5
INTERFACE LOGIC
S7
S6
S1
20k
20k
20k
20k
10k
S8
D6
D5
D0 (LSB)
D7 (MSB)
20k
10k
REF
10k
10k
OUT2
CS
OUT1
RFB
WR
Figure 3. MAX5480 Functional Diagram
tCH
tCS
0
VDD
0
VDD
0
NOTES:
1. FOR THE MAX5480, ALL INPUT SIGNAL RISE AND FALL TIMES ARE MEASURED
FROM 10% TO 90% OF VDD. VDD = +5V, tr = tf = 20ns.
2. TIMING MEASUREMENT REFERENCE LEVEL IS (VIH + VIL) / 2.
CS
WR
DATA IN
(D7–D0)
DATA IN
STABLE
VDD
tWR
tDS
VIH
VIL
tDH
Figure 4. Write-Cycle Timing Diagram
Table 2. Unipolar Binary Code Table
Table 3. Bipolar (Offset Binary) Code Table
NOTE
LSB
V
REF
: 1
2
1
256
8
= (
) =
(
)
NOTE
LSB
V
REF
: 1
2
1
128
7
= (
) =
(
)
DIGITAL INPUT
MSB
LSB
1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
ANALOG OUTPUT
1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
DIGITAL INPUT
MSB
LSB
1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
ANALOG OUTPUT
1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
-V
255
256
REF
-V
129
256
REF
-V
128
256
REF
=
VREF
2
-V
127
256
REF
-V
1
256
REF
-V
0
256
REF
= 0
+V
127
128
REF
+V
1
128
REF
-V
1
128
REF
-V
127
128
REF
-V
128
REF
0
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