- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383439 > MAX547BEQH (MAXIM INTEGRATED PRODUCTS INC) Octal, 13-Bit Voltage-Output DAC with Parallel Interface PDF資料下載
參數(shù)資料
| 型號： | MAX547BEQH |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | Octal, 13-Bit Voltage-Output DAC with Parallel Interface |
| 中文描述： | OCTAL, PARALLEL, WORD INPUT LOADING, 5 us SETTLING TIME, 13-BIT DAC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 230K |
| 代理商： | MAX547BEQH |
Reference and Analog-Ground Inputs
The REF_ inputs can range between AGND_ and V
DD
.
However, the DAC outputs will operate to V
DD
- 0.6V
and V
SS
+ 0.6V, due to the output amplifiers’ voltage-
swing limitations. The AGND_ inputs can be offset by
any voltage within the supply rails. The offset-voltage
potential must be lower than the reference-voltage
potential. For more information, refer to the Digital Code
and Analog Output Voltage section in the Applications
Information.
The input impedance of the REF_ inputs is code depen-
dent. It is at its lowest value (5k
min) when the input
code of the referring DAC pair is 0 1010 1010 1010
(0AAAhex). Its maximum value, typically 50k
, occurs
when the code is 0000hex. When all reference inputs are
driven from the same source, the minimum load imped-
ance is 1.25k
. Since the input impedance at REF_ is
code dependent, load regulation of the reference used is
important. For more information, see Reference
Selectionin the Applications Information section.
The input capacitance at REF_ is also code dependent,
and typically varies from 125pF to 300pF. Its minimum
value occurs when the code of the referring DAC pair is
set to all 0s. It is at its maximum value with all 1s on both
DACs.
Output Buffer Amplifiers
The MAX547’s voltage outputs are internally buffered
by precision gain-of-two amplifiers with a typical slew
rate of 3V/μs. With a full-scale transition at its output,
the typical settling time to ±
1
2
LSB is 5μs when loaded
with 10k
in parallel with 50pF, or 6μs when loaded
with 10k
in parallel with 100pF.
Digital Inputs and Interfac e Logic
All digital inputs are compatible with both TTL and
CMOS logic. The MAX547 interfaces with microproces-
sors using a data bus at least 13 bits wide. The inter-
face is double buffered, allowing simultaneous update
of all DACs. There are two latches for each DAC (see
Functional Diagram: an input latch that receives data
from the data bus, and a DAC latch that receives data
from the input latch. Address lines A0, A1, and A2
select which DAC’s input latch receives data from the
data bus, as shown in Table 1. Transfer data from the
input latches to the DAC latches by asserting the asyn-
chronous LD_ signal. Each DAC’s analog output
reflects the data held in its DAC latch. All control inputs
are level triggered.
Data can be latched or transferred directly to the DAC.
CS and WR control the input latch and LD_ transfers
information from the input latch to the DAC latch. The
input latch is transparent when CS and WR are low, and
the DAC latch is transparent when LD_ is low. The
address lines (A0, A1, A2) must be valid throughout the
time CS and WR are low (Figure 3). Otherwise, the data
can be inadvertently written to the wrong DAC. Data is
latched within the input latch when either CS or WR is
high. Taking LD_ high latches data into the DAC latches.
If LD_ is brought low when WR and CS are low, it must
be held low for t
3
or longer after WR and CS are high
(Figure 3).
Pulling the asynchronous CLR input low sets all DAC
outputs to a nominal 0V, regardless of the state of CS,
WR, and LD_. Taking CLR high latches 1000hex into
all input latches and DAC latches.
Table 1. MAX547 DAC Addressing
M
Oc tal, 13-Bit Voltage-Output
DAC with Parallel Interfac e
8
_______________________________________________________________________________________
TOINPUT LATCH OF DAC H
TOINPUT LATCH OF DAC G
TOINPUT LATCH OF DAC F
TOINPUT LATCH OF DAC E
TOINPUT LATCH OF DAC D
TOINPUT LATCH OF DAC C
TOINPUT LATCH OF DAC B
TOINPUT LATCH OF DAC A
TODAC LATCHES OF DAC G AND DAC H
TODAC LATCHES OF DAC E AND DAC G
TODAC LATCHES OF DAC C AND DAC D
TODAC LATCHES OF DAC C AND DAC B
TOALL INPUT AND DAC LATCHES
A2
A1
A0
LDGH
LDEF
LDCD
LDAB
CLR
WR
CS
Figure 2. Input Control Logic
A0
0
A2
0
FUNCTION
DAC A input latch
1
0
DAC D input latch
DAC E input latch
DAC F input latch
DAC G input latch
DAC H input latch
1
0
0
0
DAC B input latch
DAC C input latch
0
1
0
1
A1
0
1
1
1
1
0
1
1
0
0
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX547ACQH | Octal, 13-Bit Voltage-Output DAC with Parallel Interface |
| MAX547BCMH | Octal, 13-Bit Voltage-Output DAC with Parallel Interface |
| MAX547ACMH | Octal, 13-Bit Voltage-Output DAC with Parallel Interface |
| MAX547BEMH | Octal, 13-Bit Voltage-Output DAC with Parallel Interface |
| MAX547BCQH | Octal, 13-Bit Voltage-Output DAC with Parallel Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX547BEQH+D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 13-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX547BEQH+TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 13-Bit 8Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX547BEQH-D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX547BEQH-TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5480ACEE | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。