參數(shù)資料
型號(hào): MAX5401EKA-T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 3/8頁(yè)
文件大?。?/td> 0K
描述: IC DIGITAL POT 256-TAP SOT23-8
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: SOT-PoT™
接片: 256
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 50 ppm/°C
存儲(chǔ)器類型: 易失
接口: 3 線串行(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應(yīng)商設(shè)備封裝: SOT-23-8
包裝: 剪切帶 (CT)
其它名稱: MAX5401EKA-TCT
MAX5400/MAX5401
256-Tap SOT-PoT,
Low-Drift Digital Potentiometers in SOT23
_______________________________________________________________________________________
3
Note 1: Linearity is defined in terms of the H to L code-dependent resistance.
Note 2: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDD and L = 0. The wiper
terminal is unloaded and measured with an ideal voltmeter.
Note 3: The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = 0. The
wiper terminal is driven with a source current of 80A for the 50k
configuration and 40A for the 100k configuration.
Note 4: The wiper resistance is measured assuming the source currents given in Note 2.
Note 5: Digital timing is guaranteed by design.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS
Input High Voltage
VIH
VCC = 5V
0.7 VDD
V
Input Low Voltage
VIL
VCC = 5V
0.3 VDD
V
Input High Voltage
VIH
VCC = 3V
0.7 VDD
V
Input Low Voltage
VIL
VCC = 3V
0.3 VDD
V
Input Leakage Current
±1.0
A
Input Capacitance
5.0
pF
TIMING CHARACTERISTICS (Voltage Divider Mode)
MAX5400 (to 50% of final value, from code 0
to code 128)
300
Wiper Settling Time
tIL
MAX5401 (to 50% of final value, from code 0
to code 128)
600
ns
TIMING CHARACTERISTICS (Digital) (Note 5)
SCLK Clock Period
tCP
100
ns
SCLK Pulse Width High
tCH
40
ns
SCLK Pulse Width Low
tCL
40
ns
CS Fall to SCLK Rise Setup
Time
tCSS
40
ns
SCLK Rise to
CS Rise Hold Time
tCSH
0ns
DIN Setup Time
tDS
40
ns
DIN Hold Time
tDH
0ns
SCLK Rise to
CS Fall Delay
tCS0
10
ns
CS Rise to SCLK Rise Hold
tCS1
40
ns
CS Pulse Width High
tCSW
100
ns
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V, VH = VDD, VL = 0, TA = TMIN to TMAX. Typical values are at TA = +25°C, unless otherwise noted. Parameters are mea-
sured at TA = +25°C. Values over full temperature range are guaranteed by design.)
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