參數(shù)資料
型號: MAX5387MAUD+T
廠商: Maxim Integrated Products
文件頁數(shù): 15/15頁
文件大?。?/td> 0K
描述: IC DGTL POT 256POS 50K 14TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 易失
接口: I²C(設(shè)備位址)
電源電壓: 2.6 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
Dual, 256-Tap, Volatile, Low-Voltage
Linear Taper Digital Potentiometer
MAX5387
_______________________________________________________________________________________ 9
Detailed Description
The MAX5387 dual, 256-tap, volatile, low-voltage linear
taper digital potentiometer offers three end-to-end resis-
tance values of 10kI, 50kI, and 100kI. The potenti-
ometer consists of 255 fixed resistors in series between
terminals H_ and L_. The potentiometer wiper, W_, is
programmable to access any one of the 256 tap points
on the resistor string.
The potentiometers are programmable independently of
each other. The MAX5387 features an I2C interface.
I2C Digital Interface
The I2C interface contains a shift register that decodes
the command and address bytes, routing the data to the
appropriate control registers. Data written to a control
register immediately updates the wiper position. Wipers
A and B power up in midposition, D[7:0] = 80H.
Serial Addressing
The MAX5387 operates as a slave device that receives
data through an I2C-/SMBusK-compatible 2-wire serial
interface. The interface uses a serial-data access (SDA)
line and a serial-clock line (SCL) to achieve bidirec-
tional communication between master(s) and slave(s). A
master, typically a microcontroller, initiates all data trans-
fers to the MAX5387, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX5387 SDA line operates as both an input and
an open-drain output. The SDA line requires a pullup
resistor, typically 4.7kI. The MAX5387 SCL line oper-
ates only as an input. The SCL line requires a pullup
resistor (typically 4.7kI) if there are multiple masters on
the 2-wire interface, or if the master in a single-master
system provides an open-drain SCL output.
Each transmission consists of a START (S) condition
(Figure 3) sent by a master, followed by the MAX5387
7-bit slave address plus the NOP/W bit (Figure 6), 1
command byte and 1 data byte, and finally a STOP (P)
condition (Figure 3).
START and STOP Conditions
SCL and SDA remain high when the interface is inactive.
A master controller signals the beginning of a transmis-
sion with a START condition by transitioning SDA from
high to low while SCL is high. The master controller issues
a STOP condition by transitioning the SDA from low to
high while SCL is high, after finishing communicating with
the slave. The bus is then free for another transmission.
SMBus is a trademark of Intel Corp.
Figure 2. I2C Serial Interface Timing Diagram
SDA
SCL
START
CONDITION
(S)
tLOW
tBUF
tHIGH
tHD:STA
tSU:DAT
tR
tF
tSU:STD
REPEATED
START CONDITION
(Sr)
ACKNOWLEDGE (A)
STOP CONDITION
(P)
START CONDITION
(S)
tHD-DAT
tSU:DTA
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