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參數(shù)資料
| 型號： | MAX537BMDE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial Interface |
| 中文描述： | QUAD, SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 361K |
| 代理商： | MAX537BMDE |
M
Calibrated, Quad, 12-Bit
Voltage-Output DACs with S erial Interfac e
14
______________________________________________________________________________________
CS
SCK
SDI
SDO
LDAC*
t
CSO
t
CSS
t
CL
t
CH
t
CP
t
DO1
t
TR
t
CSW
t
CSI
t
LDAC
t
DO2
t
CSH
t
DS
t
DH
t
DV
*USE OF LDAC IS OPTIONAL
Figure 6. Detailed Serial-Interface Timing Diagram
Figure 4. 3-Wire Serial-Interface Timing Diagram (LDAC = GND or V
DD
)
Figure 5. 4-Wire Serial-Interface Timing Diagram for Asynchronous DAC Updating Using LDAC
CS
SCK
SDI
SDO
MSB
MSB FROM
PREVIOUS WRITE
LSB
LSB FROM
PREVIOUS WRITE
D15 D14 D13
D2 D1 D0
..........
Q15
Q0
COMMAND
EXECUTED
..........
..........
...........
9
8
16
1
CS
SCK
SDI
SDO
MSB
MSB FROM
PREVIOUS WRITE
LSB
LSB FROM
PREVIOUS WRITE
D15 D14 D13
D2 D1 D0
..........
Q15
Q0
INPUT REGISTER(S)
UPDATED
..........
..........
..........
9
8
16
1
DACs
UPDATED
LDAC
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