參數(shù)資料
型號: MAX531BESD
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: +5V, Low-Power, Voltage-Output, Serial 12-Bit DACs
中文描述: SERIAL INPUT LOADING, 25 us SETTLING TIME, 12-BIT DAC, PDSO14
封裝: 0.150 INCH, SOIC-14
文件頁數(shù): 13/16頁
文件大小: 207K
代理商: MAX531BESD
AC Considerations
Digital Feedthrough
High-speed serial data at any of the digital input or output
pins may couple through the DAC package and cause
internal stray capacitance to appear at the DAC output as
noise, even though
CS
is held high (see Typical Operating
Characteristics). This digital feedthrough is tested by hold-
ing CS high, transmitting 555 hex from DIN to DOUT.
Analog Feedthrough
Because of internal stray capacitance, higher frequency
analog input signals may couple to the output as shown in
the Analog Feedthrough vs. Frequency graph in the
Typical Operating Characteristics It is tested by holding
CS
high, setting the DAC code to all 0s, and sweeping
REFIN.
M
+5V, Low-Power, Voltage-Output,
S erial 12-Bit DACs
______________________________________________________________________________________
13
MAX531
INVERTED
R-2R DAC
DIN DOUT
SIGNAL
IN
2.048V
REFIN
V
DD
V
SS
2R
2R
CS CLR
BIPOFF
RFB
VOUT
REFOUT
Figure 9. MAX531 Connected as Four-Quadrant Multiplier. The
unused REFOUT is connected to V
DD
.
1
0
2
3
4
1
2 3
4
5
6
7
8
POSITIVE OFFSET
NEGATIVE OFFSET
DAC CODE (LSB)
O
Figure 10. Single-Supply Offset
8
10
9
14
13
12
11
5
6
2
3
4
7
1
8
7
6
5
1
2
3
4
0.1
μ
F
(b) MAX538/MAX539 BYPASSING
(a) MAX531 BYPASSING
ANALOG GROUND PLANE
0.1
μ
F
0.1
μ
F
Figure 11. Power-Supply Bypassing
相關(guān)PDF資料
PDF描述
MAX538AESA Differential Bus Transceiver 8-SOIC -25 to 85
MAX538BCPA +5V, Low-Power, Voltage-Output, Serial 12-Bit DACs
MAX538BCSA +5V, Low-Power, Voltage-Output, Serial 12-Bit DACs
MAX538BESA +5V, Low-Power, Voltage-Output, Serial 12-Bit DACs
MAX539ACPA +5V, Low-Power, Voltage-Output, Serial 12-Bit DACs
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