參數(shù)資料
型號: MAX5195EGM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 14-Bit, 260Msps High-Dynamic Performance DAC
中文描述: PARALLEL, WORD INPUT LOADING, 14-BIT DAC, QCC48
封裝: 7 X 7 MM, 0.90 MM HEIGHT, QFN-48
文件頁數(shù): 14/17頁
文件大?。?/td> 599K
代理商: MAX5195EGM
M
Grounding, Bypassing, and Power-Supply
Considerations
Grounding and power-supply decoupling can strongly
influence the performance of the MAX5195. Unwanted
digital crosstalk can couple through the input, refer-
ence, power supply, and ground connections, thus
affecting dynamic performance. Proper grounding and
power-supply decoupling guidelines for high-speed,
high-frequency applications should be closely followed.
This reduces EMI and internal crosstalk, which can also
affect the dynamic performance of the MAX5195.
Use of a multilayer printed circuit (PC) board with sepa-
rate ground and power-supply planes is recommend-
ed. High-speed signals should be run on lines directly
above the ground plane. Since the MAX5195 has sepa-
rate analog and digital ground buses (AGND and
DGND, respectively), the PC board should have sepa-
rate analog and digital ground sections with only one
point connecting the two planes. Digital signals should
run above the digital ground plane and analog signals
above the analog ground plane. Digital signals should
be kept as far away from sensitive analog inputs, refer-
ence input lines, and clock inputs. Digital signal paths
should be kept short and run lengths matched to avoid
propagation delay mismatch.
The MAX5195 has two separate power-supply inputs
for analog (AV
CC
) and digital (DV
CC
). Each AV
CC
input
should be decoupled with parallel ceramic chip capac-
itors of 10μF in parallel with 0.1μF and 47pF with these
capacitors as close to the supply pins as possible and
their opposite ends with the shortest possible connec-
tion to the ground plane (Figure 8). The DV
CC
pins
should also have separate 10μF in parallel with 0.1μF
and 47pF capacitors adjacent to their respective pins.
Try to minimize the analog and digital load capaci-
tances for proper operation.
14-Bit, 260Msps High-Dynamic
Performance DAC
14
______________________________________________________________________________________
AGND
1.2V
REFERENCE
CURRENT-SOURCE
ARRAY
INPUT LATCH
INPUT REGISTER
CLKP
CLKN
R2R
NETWORK
REFOUT
REFIN
RSET
D0N/D0P
D13N/D13P
14
DECODER
BIAS
DV
CC
DGND
5V
OUTP
OUTN
AGND
AGND
AGND
0.1
μ
F
1
μ
F
3.83k
3k
27.4
27.4
260MHz,
LVPECL
2V
1.6V
2.4V
1.5
μ
F
AMPOUT
AV
CC
10
μ
F
0.1
μ
F
47pF
47pF
0.1
μ
F
10
μ
F
5V
V
OUT
MAX5195
Figure 8. Decoupling and Bypassing Techniques for MAX5195—Typical Operating Circuit
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