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參數(shù)資料
| 型號： | MAX5183BEEI+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 10BIT 40MHZ DUAL 28-QSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 50 |
| 設置時間： | 25µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 28-QSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 1397 (CN2011-ZH PDF) |
MAX5180/MAX5183
Dual, 10-Bit, 40MHz, Current/Voltage
Simultaneous-Output DACs
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = 3V ±10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400 differential output, CL = 5pF, TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.)
CONDITIONS
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
PD = 1, DACEN = X, digital inputs at 0
or DVDD (X = don’t care)
PD = 0, DACEN = 0, digital inputs at 0
or DVDD
PD = 0, DACEN = 1, digital inputs at 0
or DVDD
PD = 0, DACEN = 1, digital inputs at 0
or DVDD
A
0.5
1.0
ISHDN
Shutdown Current
mA
1.0
1.5
ISTANDBY
Standby Current
mA
4.2
5.0
IDVDD
Digital Supply Current
V
2.7
3.3
DVDD
Digital Power-Supply Voltage
mA
2.7
5.0
IAVDD
Analog Supply Current
V
2.7
3.3
AVDD
Analog Power-Supply Voltage
mA/mA
8
Current Gain (IFS / IREF)
mV/V
0.5
Reference Supply Rejection
A
10
IREFOUT
Reference Output Drive
Capability
ppm/°C
50
TCVREF
Output Voltage Temperature
Drift
V
1.12
1.2
1.28
VREF
Output Voltage Range
VIN = 0 or DVDD
ns
0
tDH2
DAC2 CLK Fall to DATA
Hold Time
ns
0
tDH1
DAC1 CLK Rise to DATA
Hold Time
ns
10
tDS2
DAC2 DATA to CLK Fall
Setup Time
ns
10
tDS1
DAC1 DATA to CLK Rise
Setup Time
pF
10
CIN
Digital Input Capacitance
A
±1
IIN
Digital Input Current
V
0.8
VIL
Digital Input Voltage Low
V
2
VIH
Digital Input Voltage High
ns
10
tCL
Clock Low Time
ns
10
tCH
Clock High Time
ns
25
tCP
Clock Period
s
50
PD Fall Time to VOUT_
s
0.5
DACEN Rise Time to VOUT_
ns
5
CS Fall to CLK Fall Time
ns
5
CS Fall to CLK Rise Time
REFERENCE
POWER REQUIREMENTS
LOGIC INPUTS AND OUTPUTS
TIMING CHARACTERISTICS
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