
M
Low-Power, Dual, 12-Bit Voltage-Output DACs
with Configurable Outputs
_______________________________________________________________________________________
5
ELECTRICAL CHARACTERISTICS—MAX5157 (continued)
(V
DD
= +2.7V to +3.6V, V
REFA
= V
REFB
= 1.25V, R
L
= 10k
, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values
are at T
A
= +25°C, output buffer connected in unity-gain configuration (Figure 9).)
(Note 4)
(Note 7)
(Note 7)
ns
40
t
CL
SCLK Pulse Width Low
CONDITIONS
ns
40
t
CH
SCLK Pulse Width High
ns
100
t
CP
SCLK Clock Period
μA
±1
Reference Current in
Shutdown
TIMING CHARACTERISTICS
μA
1
8
I
DD(SHDN)
Power-Supply Current in
Shutdown
mA
0.5
0.6
I
DD
Power-Supply Current
V
2.7
3.6
V
DD
Positive Supply Voltage
ns
ns
50
0
t
DS
t
DH
DIN Setup Time
DIN Hold Time
ns
0
t
CHS
SCLK Rise to
CS
Rise Hold
Time
ns
40
t
CSS
CS
Fall to SCLK Rise Setup
Time
C
LOAD
= 200pF
C
LOAD
= 200pF
ns
120
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
POWER SUPPLIES
t
DO2
SCLK Fall to DOUT Valid
Propagation Delay
SCLK Rise to
CS
Fall Delay
ns
120
t
DO1
SCLK Rise to DOUT Valid
Propagation Delay
ns
100
t
CSW
CS
Pulse Width High
ns
40
t
CS1
CS
Rise to SCLK Rise Hold
ns
10
t
CS0
Note 5:
Accuracy is specified from code 20 to code 4095.
Note 6:
Accuracy is better than 1LSB for V
OUT
greater than 6mV and less than V
DD
- 100mV. Guaranteed by PSRR test at the end
points.
Note 7:
Digital inputs are set to either V
DD
or DGND, code = 0000 hex, R
L
=
∞
.