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參數(shù)資料
| 型號： | MAX5104EEE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT DUAL SER 16-QSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 100 |
| 設置時間： | 15µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-QSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 1397 (CN2011-ZH PDF) |
MAX5104
Low-Power, Dual, Voltage-Output, 12-Bit DAC
with Serial Interface
8
_______________________________________________________________________________________
The MAX5104’s digital inputs are double buffered,
which allows any of the following: loading the input reg-
ister(s) without updating the DAC register(s), updating
the DAC register(s) from the input register(s), or updating
the input and DAC registers concurrently. The address
and control bits allow the DACs to act independently.
Send the 16-bit data as one 16-bit word (QSPI) or two
8-bit packets (SPI, MICROWIRE), with
CS low during
this period. The address and control bits determine
which register will be updated, and the state of the reg-
isters when exiting power-down. The 3-bit address/con-
trol determines the following:
Registers to be updated
Clock edge on which data is to be clocked out via the
serial-data output (DOUT)
State of the user-programmable logic output
Configuration of the device after power-down
The general timing diagram of Figure 5 illustrates how
data is acquired. Driving
CS low enables the device to
receive data; otherwise, the interface control circuitry is
disabled. With
CS low, data at DIN is clocked into the
register on the rising edge of SCLK. As
CS goes high,
data is latched into the input and/or DAC registers,
depending on the address and control bits. The maximum
clock frequency guaranteed for proper operation is
10MHz. Figure 6 shows a more detailed timing diagram
of the serial interface.
DIN
SCLK
CS
MOSI
SCK
I/O
SPI/QSPI
PORT
SS
+5V
CPOL = 0, CPHA = 0
MAX5104
Figure 3. Connections for SPI/QSPI
Figure 5. Serial-Interface Timing Diagram
SCLK
DIN
CS
COMMAND
EXECUTED
9
8
16
1
C1
A0
S0
C0
D11
D10
D9
D8
D5
D4
D3
D2
D1
D0
D7
D6
Figure 4. Serial-Data Format
1 Address/2 Control Bits
A0
Address Bits
C1, C0
Control Bits
12 Data Bits
D11.......................D0
MSB...Data Bits...LSB
0
S0
Sub
Bit
16 Bits of Serial Data
MSB...................................................................................LSB
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5104EEE+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5104EEE+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5104EEE-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5104XXXXX | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:RADIATION HARD 4096 x 1 BIT STATIC RAM |
| MAX5105 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Nonvolatile, Quad, 8-Bit DACs |
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