參數(shù)資料
型號: MAX4840AEXT+T
廠商: Maxim Integrated Products
文件頁數(shù): 7/11頁
文件大?。?/td> 0K
描述: IC CTLR OVP 5.8V SC70-6
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
類型: 過壓保護控制器
應用: 手機,數(shù)碼相機,媒體播放器
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP,SC-88,SOT-363
供應商設備封裝: SC-70-6
包裝: 標準包裝
產(chǎn)品目錄頁面: 1423 (CN2011-ZH PDF)
其它名稱: MAX4840AEXT+TDKR
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status
FLAG
_______________________________________________________________________________________
5
PIN
NAME
FUNCTION
1IN
Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN to GND with
a 1F capacitor or larger.
2
GND
Ground
3
FLAG
Fault Indication Output, Open-Drain, Active Low. FLAG is asserted low during undervoltage-
lockout and overvoltage-lockout conditions. FLAG is deasserted during normal operation.
4
GATE
Gate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN < VOVLO,
GATE is driven high to turn on the external n-channel MOSFET(s).
5N.C.
No Connection. Not internally connected for DFN package. Connected to ground for SC70
6-pin package; connect to ground or leave unconnected.
6
EN
Device Enable Input, Active Low. Drive EN low or connect to ground to allow normal device
operation. Drive EN high to turn off the external MOSFET.
Pin Description
VIN
VGATE
0V
VUVLO
0.3V
tSTART
2.4V
tBLANK
8V (6V)
tGON
VFLAG
5V (4V)
( ) MAX4842A
Figure 1. Startup Timing Diagram
VIN
VGATE
VOVLO
0.3V
tGOFF
0.4V
tFLAG
5V (4V)
8V (6V)
VFLAG
( ) MAX4842A
Figure 2. Shutdown Timing Diagram
VIN
IGATE
VOVLO
80%
tOVP
0V
8V (6V)
( ) MAX4842A
Figure 3. Power-Up Overvoltage Timing Diagram
VGATE
0.3V
tDIS
1.5V
VEN
Figure 4. Disable Timing Diagram
Timing Diagrams
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