參數(shù)資料
型號(hào)： MAX4814EECB+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 4/17頁(yè)
文件大小： 0K
描述： IC SW DVI/HDMI 2:4 BIDIR 64-TQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 750
功能： 開(kāi)關(guān)，DVI/HDMI
電路： 1 x 2:4
導(dǎo)通狀態(tài)電阻： 12 歐姆
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 4.5 V ~ 5.5 V
電流 - 電源： 10µA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-TQFP-EP（10x10）
包裝： 帶卷 (TR)
MAX4814E
For example: If AD0, AD1, and AD2 are hardwired to
ground, then the complete address is 0111000. The full
address is defined as the seven most significant bits
followed by the read/write bit. Set the read/write bit to 1
to configure the MAX4814E to read mode. Set the
read/write bit to 0 to configure the MAX4814E to write
mode. The address is the first byte of information sent
to the MAX4814E after the START condition.
.
Applications Information
ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
assembly. Switch A, switch B, and switch SW_ are fur-
ther protected against static electricity. Maxim’s engi-
neers have developed state-of-the-art structures to
protect these pins against ESD up to ±6kV without
damage. The ESD structures withstand high ESD in
normal operation, and when the device is powered
down. ESD protection can be tested in various ways.
The ESD protection of switch A, switch B, and switch
SW_ are characterized for ±6kV (Human Body Model)
using the MIL-STD-883.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 7 shows the Human Body Model, and Figure 8
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest
that is then discharged into the test device through a
1.5kΩ resistor.
DVI/HDMI 2:4 Low-Frequency Fanout Switch
12
______________________________________________________________________________________
Table 4. I2C Register R1 (0X01) to DO_ Mapping
PIN
REGISTER R1 (0x01)
MODE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
OUTPUT PIN
CONFIGURATION
1
—
0
DO0
0
1
—
0
1
DO0
1
—
1
X
DO0
Hi-Z
1—
—
0
0—
—
DO1
0
1—
—
0
1—
—
DO1
1
—
1
X
—
DO1
Hi-Z
1—
—0
0—
—
DO2
0
1—
—0
1—
—
DO2
1
—
1
X
—
DO2
Hi-Z
100
—
DO3
0
101
—
DO3
1
X
—
DO3
Hi-Z
Table 5. I2C Register R0 (0x00)
REGISTER R0 (0x00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
BBEN
BBSEL1
BBSEL0
BAEN
BASEL1
BASEL0
X
X = Hardwired, not programmed by user.
X = Don’t care.
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