參數(shù)資料
型號: MAX4571
廠商: Maxim Integrated Products, Inc.
英文描述: Serially Controlled, Clickless Audio/Video Switches
中文描述: 串行控制、無喀嗒聲的音頻/視頻開關(guān)
文件頁數(shù): 11/16頁
文件大?。?/td> 315K
代理商: MAX4571
M
S erially Controlled, Clic kless
Audio/Video S witc hes
______________________________________________________________________________________
11
Table 1. Command Bit Mapping
Table 2. Data-Bit Switch Control
X = Don’t care
MSB
0
0
1
1
MSB - 1
0
1
0
1
COMMAND
RESET
MODESET
NO_OP
SWITCHSET
DESCRIPTION
Sets all switches open and in soft switching mode.
Sets specified switches to soft or hard mode.
No Operation.
Sets specified switches open or closed.
D13
D12
D11
D10
D9
X
X
X
SW8
SW5
SW7B
SW7A
SW6B
15, 16
17, 18
D8
D7
D6
D5
D4
D3
D2
D1
19, 20
21, 22
13, 14
11, 12
9, 10
7, 8
5, 6
3, 4
1, 2
SW6A
SW4B
SW4A
SW3B
SW3A
SW2B
SW2A
SW1B
SW1A
X
X
X
SW11
SW10
SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
15, 16
13, 14
17, 18
18, 19
20, 21
21, 22
11, 12
10, 11
8, 9
7, 8
5, 6
4, 5
2, 3
1, 2
D0 (LSB)
DATA BIT
SWITCH
SWITCH
SWITCH TERMINALS
SWITCH TERMINALS
MAX4572/MAX4574
MAX4571/MAX4573
communicating with the slave, it issues a stop condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission.
3-Wire S erial Interfac e
The MAX4573/MAX4574 use a 3-wire SPI/QSPI/
MICROWIRE-compatible serial interface. An active-low
chip-select pin,
CS
, enables the device to receive data
from the serial input pin, DIN. Command and data infor-
mation are clocked in on the rising edge of the serial-
clock signal (SCLK) MSB first. A total of 16 bits are
needed in each write cycle. The write cycle allows two
8-bit-wide transfers if
CS
remains low for the entire 16
bits. The command code is contained in the two MSBs
of the 16-bit word. The remaining bits control the
switches as shown in Table 4. While shifting in the seri-
al data, the device remains in its original configuration.
A rising edge on
CS
latches the data into the
MAX4573/MAX4574 internal registers, initiating the
device’s change of state. Table 4 shows the details of
the 3-wire interface data structure.
Figures 5 and 6 and the I/O Interface Characteristics
show the timing details of the 3-wire interface. If the
two command bits initiate a SWITCHSET command, a
logic 1 in a switch control location closes the associat-
ed switch, while a logic 0 opens it. If the command bits
initiate a MODESET command, a logic 1 in a switch
control location sets the associated switch into hard
mode, while a logic 0 sets it into soft, “clickless” mode.
For command-bit configurations, see Table 1.
Using Multiple Devic es
There are two ways to connect multiple devices to the
same 3-wire serial interface. The first involves using the
DOUT pin. DOUT presents a copy of the last bit of the
internal shift register, useful for daisy-chaining multiple
devices. Data at DOUT are simply the input data
delayed by 16 clock cycles, appearing synchronous
with SCLK’s falling edge. After
CS
goes high, DOUT
holds the last bit in the shift register until new data are
shifted into DIN. For a simple interface using several
MAX4573/MAX4574 devices, daisy-chain the shift reg-
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