參數(shù)資料
型號： MAX4399CTK+T
廠商： Maxim Integrated Products
文件頁數(shù)： 29/33頁
文件大小： 0K
描述： IC SW A/V SCART CON 68-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類型： 開關(guān)
應(yīng)用： 接收器，機(jī)頂盒，電視
安裝類型： 表面貼裝
封裝/外殼： 68-TQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 68-TQFN-EP（10x10）
包裝： 帶卷 (TR)
MAX4399
Audio/Video Switch for Three SCART
Connectors
_______________________________________________________________________________________
5
ELECTRICAL CHARACTERISTICS (continued)
(VV12 = 12V, VV_VID = 5V, VV_DIG = 5V, 0.47F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from V_AUD to
G_AUD, no load, TA = 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Receive SCL/SDA Rise
Time (Note 3)
tR
20 +
0.1CB
ns
Maximum Receive SCL/SDA Fall
Time (Note 3)
tF
300
ns
Minimum Receive SCL/SDA Fall
Time (Note 3)
tF
20 +
0.1CB
ns
Setup Time for Stop Condition
tSU,STO
0.6
s
Bus Free Time Between a Stop
and Start
tBUF
1.3
s
OTHER DIGITAL PINS
DEV_ADDR Low Level
0.8
V
DEV_ADDR High Level
2.6
V
INTERRUPT_OUT Low Voltage
INTERRUPT_OUT sinking 1mA
0.15
0.4
V
INTERRUPT_OUT High Leakage
Current
VINTERRUPT_OUT = 5V
1
10
A
SLOW SWITCHING
Input Low Level
02
V
Input Medium Level
4.5
7.0
V
Input High Level
9.5
12.0
V
Input Current
50
100
A
Output Low Level
RLOAD = 10k
to ground
0
1.5
V
Output Medium Level (External
16/9)
RLOAD = 10k
to ground
5.0
6.5
V
Output High Level (External 4/3)
RLOAD = 10k
to ground
10
12
V
FAST SWITCHING
Input Low Level
0
0.4
V
Input High Level
13
V
Input Current
110
A
Output Low Level
ISINK = 0.5mA
0
0.01
0.2
V
Output High Level
V_VID - VOH, ISOURCE = 20mA
0.75
2
V
Fast-Switching Output to RGB
Skew
Difference in propagation delays of fast-
switching signal and RGB signals;
measured from 50% input transition to 50%
output transition
30
ns
Fast-Switching Output Rise Time
RLOAD = 150
to ground
30
ns
Fast-Switching Output Fall Time
RLOAD = 150
to ground
30
ns
Note 1: All devices are 100% tested at TA = +25°C. All temperature limits are guaranteed by design.
Note 2: Parameter guaranteed by design.
Note 3: CB = total capacitance of one bus line in pF. Tested with CB = 400pF.
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