It is recommended that VCC be bypassed to GND with at lea" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MAX4375HEUB+T
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋佹暩(sh霉)锛� 3/13闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC AMP CURRENT SENSE 10-UMAX
鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯欐簴鍖呰锛� 2,500
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鎳夌敤锛� 闆绘祦鎰熸脯锛岄浕婧愮鐞�
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳鍟嗚ō(sh猫)鍌欏皝瑁濓細 10-µMAX
鍖呰锛� 甯跺嵎 (TR)
Power-Supply Bypassing
It is recommended that VCC be bypassed to GND with
at least a 0.1F ceramic capacitor to isolate the IC from
supply voltage transients. It is possible that plugging
in/out a battery or AC adapter/charger could cause
large, fast line transients (>5V/s) at VCC. The simplest
solution is to run VCC from a better regulated supply
(+5V for example), since VCC and RS+ (or RS-) do not
have to be connected together.
For high-speed VCC transients, another solution is to
add a resistor in series with the VCC pin and a 0.1F
capacitor to create an RC time constant to slow the rise
time of the transient. Since these current-sense ampli-
fiers consume less than 100A, even a 2.5k resistor
only drops an extra 250mV at VCC. For most applica-
tions with fast transients, 1k in conjunction with a
0.1F bypass capacitor works well.
RESET at Power-Up
The RESET pin is used to control the latch function of
comparator 1. Holding RESET low (<0.8V) makes the
latch transparent and COUT1 will respond to changes
at CIN1, above and below the internal 600mV reference
threshold voltage. When RESET is high (>2.0V), once
CIN1 rises above 600mV, COUT1 latches into the
open-drain OFF state and remains in this state even if
CIN1 drops below 600mV. Pulsing RESET low for at
least 1.5s resets the latch.
There is no internal circuitry to control the reset function
during power-up. To prevent false latching, RESET
must be held low until the VCC power has risen above
the 2.7V minimum operating supply voltage. This is
easily accomplished when RESET is driven under C or
logic gate control. However, if RESET is to be always
connected high, add an RC between VCC, RESET and
GND (see Figure 2). Note that RESET cannot exceed
VCC + 0.3V or +12V, whichever is less.
The following formula can be used to determine the
appropriate RC value.
where T is the maximum time for VCC to reach 2.7V and
0.8V is the maximum RESET logic low voltage. For
example, a 470k resistor and 0.22F capacitor will
keep RESET low during a power-up time of up to 36ms.
A faster power-up time is also safe with the calculated
R and C since the capacitor will have even less time to
charge.
RC
T
VV
V
T
=
()
=
ln .
/( .
.
)
.
2 7
0 8
0 3514
MAX4373/MAX4374/MAX4375
Low-Cost, Micropower, High-Side Current-Sense
Amplifier + Comparator + Reference ICs
______________________________________________________________________________________
11
RS-
RS+
OUT
CIN1
CIN2
LOAD
VCC = 2.7V TO 28V
VIN = 0 TO 28V
MAX4375
GND
VCC
GND
R5
R4
RSENSE
+ VSENSE -
R3
COUT1
R2
R1
COUT2
ILOAD
RESET
VPULL-UP
(UP TO 5V)
Figure 3. MAX4375 Window Detector
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
MAX4375TESD+T IC AMP CURRENT SENSE 14-SOIC
MAX4375HESD+T IC AMP CURRENT SENSE 14-SOIC
MAX4374TEUB+T IC AMP CURRENT SENSE 10-UMAX
AD767JPZ-REEL IC DAC 12BIT W/AMP 28-PLCC
AD767JP-REEL IC DAC 12BIT W/AMP 28-PLCC
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MAX4375TESD 鍔熻兘鎻忚堪:鐗规畩鐢ㄩ€旀斁澶у櫒 RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:Single 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級: 杓稿叆瑁滃劅闆诲: 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5 mA 鏈€澶у姛鐜囪€楁暎: 鏈€澶у伐浣滄韩搴�:+ 70 C 鏈€灏忓伐浣滄韩搴�:- 40 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:QFN-20 灏佽:Reel
MAX4375TESD+ 鍔熻兘鎻忚堪:闆绘祦闈堟晱鏀惧ぇ鍣� uPower High-Side Current-Sense Amp RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�: 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:110 dB 杓稿叆瑁滃劅闆诲:80 uV 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:2.7 V 闆绘簮闆绘祦:350 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 鏈€灏忓伐浣滄韩搴�:- 40 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:VQFN-16 灏佽:Reel
MAX4375TESD+T 鍔熻兘鎻忚堪:闆绘祦闈堟晱鏀惧ぇ鍣� uPower High-Side Current-Sense Amp RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�: 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:110 dB 杓稿叆瑁滃劅闆诲:80 uV 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:2.7 V 闆绘簮闆绘祦:350 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 鏈€灏忓伐浣滄韩搴�:- 40 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:VQFN-16 灏佽:Reel
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