
MAX4112/MAX4113/MAX4117–MAX4120
Single/Dual/Quad, 400MHz, Low-Power,
Current Feedback Amplifiers
10
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At low gains, G x RIN << RF. Therefore, the closed-loop
bandwidth is essentially independent of closed-loop
gain. Similarly, ZOL >> RF at low frequencies, so that:
Layout and Power-Supply Bypassing
The MAX4112/MAX4113/MAX4117–MAX4120 have an
RF bandwidth and consequently require careful board
layout, including the possible use of constant-impedance
microstrip or stripline techniques.
To realize the full AC performance of these high-speed
amplifiers, pay careful attention to power-supply
bypassing and board layout. The PCB should have at
least two layers: a signal and power layer on one side,
and a large, low-impedance ground plane on the other
side. The ground plane should be as free of voids as
possible. With multilayer boards, locate the ground
plane on a layer that incorporates no signal or power
traces.
Regardless of whether a constant-impedance board is
used, observe the following guidelines when designing
the board. Wire-wrapped boards are much too induc-
tive, and breadboards are much too capacitive; neither
should be used. IC sockets increase parasitic capaci-
tance and inductance, and should not be used. In gen-
eral, surface-mount components give better high-
frequency performance than through-hole components.
They have shorter leads and lower parasitic reac-
tances. Keep lines as short and as straight as possible.
Do not make 90° turns; round all corners.
Observe high-frequency bypassing techniques to
maintain the amplifier’s accuracy. The bypass capaci-
tors should include a 1000pF ceramic capacitor
between each supply pin and the ground plane, locat-
ed as close to the package as possible. Next, place a
0.01F to 0.1F ceramic capacitor in parallel with each
1000pF capacitor, and as close to them as possible.
Then place a 10F to 15F low-ESR tantalum at the
point of entry (to the PCB) of the power-supply pins.
The power-supply trace should lead directly from the
tantalum capacitor to the VCC and VEE pins. To mini-
mize parasitic inductance, keep PC traces short and
use surface-mount components.
V
G
1
R / R
OUT
IN
FG
==
+
()
VOUT
RG
VOUT = -(RF/RG) x VIN
VIN
RF
RO
RS
RT
MAX4112
MAX4113
MAX4117
MAX4118
MAX4119
MAX4120
Figure 2a. Inverting Gain Configuration
VOUT
VIN
RG
VOUT = [1+ (RF/RG)] x VIN
RF
RO
RT
MAX4112
MAX4113
MAX4117
MAX4118
MAX4119
MAX4120
Figure 2b. Noninverting Gain Configuration
100
49.9
400
49.9
600
100
0.1dB Gain Flatness (MHz)
49.9
RT ()
400
-3dB Small-Signal Bandwidth (MHz)
AVCL = +2
100
49.9
270
49.9
500
49.9
RO ()
600
RG ()
115
600
RF ()
49.9
300
49.9
47
330
115
49.9
270
115
49.9
300
49.9
47
330
49.9
69
500
AVCL = +8
MAX4117
MAX4119
MAX4112
MAX4118
MAX4120
MAX4113
Table 1. Recommended Component Values
280
Large-Signal Bandwidth (MHz)
145
240
COMPONENT