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| 型號： | MAX4032EXT-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | 5V, 6dB Video Buffer with Sync-Tip Clamp, Output Sag Correction, and 150nA Shutdown Current |
| 中文描述： | BUFFER AMPLIFIER, PDSO6 |
| 封裝： | EIAJ, SC-70, 6 PIN |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 208K |
| 代理商： | MAX4032EXT-T |
M
5V, 6dB Video Buffer with Sync-Tip Clamp,
Output Sag Correction, and 150nA Shutdown Current
_______________________________________________________________________________________
3
Note 2:
All devices are 100% production tested at T
A
= +25
°
C. Specifications over temperature limits are guaranteed by design.
Note 3:
Voltage gain (A
V
) is referenced to the clamp voltage, i.e., an input voltage of V
IN
= V
CLP
+ VI would produce an output volt-
age of V
OUT
= V
CLP
+ A
V
x VI.
Note 4:
Droop is guaranteed by the input bias current specification.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, C
OUT
= C
SAG
= 22μF, C
IN
= 0.1μF, R
IN
= 75
to GND, R
L
= 150
to GND,
SHDN
= 5.0V, T
A
= +25
°
C,
unless otherwise noted.)
PARAMETER
SYMBOL
BW
SS
BW
LS
BW
0.1dBSS
V
OUT
= 100mV
P-P
BW
0.1dBLS
V
OUT
= 2V
P-P
SR
V
OUT
= 2V step
t
S
V
OUT
= 2V step
PSRR
f = 100kHz
Z
OUT
f = 5MHz
DG
NTSC
DP
NTSC
D/dT
f = 3.58MHz or 4.43MHz
SNR
V
IN
= 1V
P-P
, 10MHz BW
C
IN
= 0.1μF (Note 4)
V
IN
= V
CLP
+ 1V,
SHDN
= 5V, V
OUT
settled
to within 1% of the final voltage
CONDITIONS
MIN
TYP
55
45
18
17
275
25
50
2.5
0.4
0.6
20
65
2
MAX
UNITS
MHz
MHz
MHz
MHz
V/μs
ns
dB
%
Degrees
ns
dB
%
Small-Signal -3dB Bandwidth
Large-Signal -3dB Bandwidth
Small-Signal 0.1dB Gain Flatness
Large-Signal 0.1dB Gain Flatness
Slew Rate
Settling Time to 0.1%
Power-Supply Rejection Ratio
Output Impedance
Differential Gain
Differential Phase
Group Delay
Peak Signal to RMS Noise
Droop
V
OUT
= 100mV
P-P
V
OUT
= 2V
P-P
3
SHDN
Enable Time
t
ON
250
ns
SHDN
Disable Time
t
OFF
V
IN
= V
CLP
+ 1V,
SHDN
= 0V, V
OUT
settled
to below 1% of the output voltage
50
ns
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