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參數(shù)資料
| 型號： | MAX3803UBP-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 其它接口 |
| 英文描述： | DC-Coupled, UCSP 3.125Gbps Equalizer |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, BGA14 |
| 封裝： | 2.50 X 2 MM, UCSP-20/14 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 254K |
| 代理商： | MAX3803UBP-T |
_______________
Detailed Description
______and Applications Information
The MAX3803 is an adaptive equalizer designed to
extend the reach of transmission lines in high-frequency
backplane and rack-to-rack interconnect applications.
The MAX3803 automatically adjusts to attenuation
caused by skin-effect and dielectric losses. Although
optimized for coded and scrambled data between
2.488Gbps and 3.125Gbps, the MAX3803 provides
effective compensation for rates between 1Gbps
and 3.2Gbps.
The MAX3803 consists of low common-mode input and
output buffers, an equalizer core, a DC-offset-correction
loop, and a limiting amplifier (Figure 2).
Low Common-Mode Input and Output
The MAX3803 permits DC-coupling to CML transmitters
and receivers that require termination voltages as low
as 1.1V and as high as V
CC
. Use the V
TI
and V
TO
pins
to maintain compatible common-mode levels between
the data source and load. V
TI
and V
TO
are independent
and can be used to bridge two common-mode require-
ments without the use of DC-blocking capacitors. See
Figure 3 and Figure 4 for the equivalent input and out-
put structures.
Media Equalization
Equalization at the input compensates for high-frequency
loss encountered with FR4 stripline (edge-coupled) or
28AWG twin ax. The equalizer core is an amplifier with a
self-adjusting frequency response.
DC Cancellation Loop
The DC cancellation loop removes the pulse-width dis-
tortion caused by internal offsets. The closed-loop
response creates a low-frequency cutoff of approxi-
mately 15kHz, below which the offset control tracks the
AC signal. This also sets the limit on the maximum time
M
DC-Coupled, UCSP 3.125Gbps Equalizer
6
_______________________________________________________________________________________
MAX3803
CML
INPUT
CML
OUTPUT
IN+
IN-
OUT+
OUT-
V
TI
V
CC
V
TO
EQUALIZER
DC
CANCELLATION
LOOP
LIMITING
AMPLIFER
Figure 2. Functional Diagram
2
2
2
2
SIGNAL
SOURCE
IN
OUT
A
B
C
CONNECTOR
CONNECTOR
≤
40in EDGE-COUPLED TRANSMISSION LINE ON FR4 OR
≤
10m 28AWG TWIN AX CABLE
MAX3803
Figure 1. Backplane Interconnect
ESD
STRUCTURES
V
CC
+1.1V
≤
V
TO
≤
V
CC
50
50
OUT+
OUT-
Figure 4. CML Output Structure
ESD
STRUCTURES
V
CC
V
CC
V
CC
+1.1V
≤
V
TI
≤
V
CC
50
50
IN+
IN-
Figure 3. CML Input Structure
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| MAX3804ETE+ | 制造商:Maxim Integrated Products 功能描述:10G BUFFER/DRIVER W/ FIXED EQUALIZATION - Rail/Tube 制造商:Maxim Integrated Products 功能描述:IC EQUALIZER REC 12.5GBPS 16TQFN 制造商:Maxim Integrated Products 功能描述:Equalizers 10G Buffer/Driver w/ Fixed Eq |
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