參數(shù)資料
型號: MAX3787AWL+T
廠商: Maxim Integrated Products
文件頁數(shù): 5/15頁
文件大小: 0K
描述: IC PASSIVE EQ 1-12.5GBPS 4-WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: 4-WLP
供應(yīng)商設(shè)備封裝: 4-WLP
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
______________________________________________________________________________________
13
Detailed Description
The MAX3787 is an entirely passive network composed
of both resistive and reactive components (Figure 4).
Two symmetric-T networks with bypassing for high-
pass characteristics are used to create a differential
symmetric-H network. The entire network acts as a filter
specifically tuned to compensate for transmission medi-
um losses encountered with FR4 and cables.
Input and Output Terminations
The MAX3787 input impedance is 100
Ω differential with
the output connected to a 100
Ω differential load. The
network is designed for 100
Ω-balanced differential sig-
nals and is not intended for single-ended transmission.
ESD Protection Diodes
The MAX3787 contains ESD diodes that bypass
the equalization network in case of static discharge
(Figure 5).
Applications Information
Equalizer Integration and Placement
The MAX3787 is packaged in a small 1.5mm x 1.5mm
UCSP that can be placed anywhere along the transmis-
sion medium. The small size allows placement and
routing flexibility.
Due to the symmetry of the equalization network, sig-
nals can pass from IN to OUT or OUT to IN with the
same compensation. The equalizer can also be placed
at the beginning or end of the transmission medium
and provide the same compensation at the receiving
circuit. For example, two equalizers can be placed in
one transceiver module, one for the transmit path and
one for the receive path (see
Typical Application
Circuits).
UCSP Assembly Considerations
For the latest application details on UCSP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow tempera-
ture profile, as well as the latest information on reliability
testing results, refer to Application Note 1891:
UCSP–A
Wafer-Level Chip-Scale Package available on Maxim’s
website at www.maxim-ic.com/ucsp.
Chip Information
TRANSISTOR COUNT: 0
PROCESS: SiGe BiPOLAR
Pin Description
PIN
NAME
FUNCTION
A1
IN+
Positive Data Input
A3
OUT+
Positive Data Output
C1
IN-
Negative Data Input
C3
OUT-
Negative Data Output
OUT-
IN-
OUT+
MAX3787
Z2
AT 0Hz (DC)
Z1 = OPEN, Z2 = 0
Ω
IN+
Z1
Figure 4. Functional Diagram
OUT-
OUT+
IN+
EQUALIZATION
NETWORK
ESD DIODES
IN-
MAX3787
Figure 5. ESD Protection Diodes
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