參數(shù)資料
型號: MAX3772CEE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Replaced by SN65LVDS048A : LVDS Quad Differential Line Receiver 16-SOIC -40 to 85
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO16
封裝: 0.150 INCH, QSOP-16
文件頁數(shù): 6/9頁
文件大?。?/td> 220K
代理商: MAX3772CEE
M
Detailed Description
Figure 2 shows the functional block diagram of the
MAX3772
MAX3775 fibre channel repeaters. They con-
sist of a fully integrated PLL, CML input and output
buffers, and a data latch. The PLL consists of a com-
bined phase detector (PD) and frequency detector
(FD), a loop filter, and a voltage-controlled oscillator
(VCO). The input and output signal buffers employ low-
noise CML architecture and are terminated on-chip.
Phase and Frequency Detector
The frequency difference between the VCO clock and
the received data is derived by sampling the in-phase
and quadrature VCO outputs on the edges of the input
data signal. The FD drives the VCO until the frequency
difference is reduced to zero. Once frequency acquisi-
tion is complete, the PD produces a voltage proportion-
al to the phase difference between the incoming data
and the internal clock. The PLL drives this error voltage
to zero, aligning the recovered clock to the center of
the incoming eye.
Dual-Rate Fibre Channel Repeaters
6
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
CF+
CDR Filter Capacitor Positive Connection. C
F
= 0.047μF.
2
CF-
CDR Filter Capacitor Negative Connection. C
F
= 0.047μF.
3, 6, 12
GND
Electrical Ground
4
IN+
Noninverted Data Input
5
IN-
Inverted Data Input
7, 8
V
CC
Supply Voltage
9
RATESEL
Rate Select Pin. TTL low selects 1.0625Gbps operation. TTL high selects 2.125Gbps operation.
10
OUT-
Inverted Data Output
11
OUT+
Noninverted Data Output
13
CLKEN
Clock Output Enable. TTL high enables the clock output. TTL low disables the clock output.
14
CLK-
Inverted Clock Output. Enabled when CLKEN is forced high; disabled when CLKEN is forced low.
15
CLK+
Noninverted Clock Output. Enabled when CLKEN is forced high; disabled when CLKEN is forced low.
16
LOCK
Frequency Lock Indicator. When data is present, a high level indicates the PLL is frequency-locked.
The output of the LOCK pin may chatter when large jitter is applied to the input.
EP
Exposed
Paddle
The exposed paddle must be soldered to the circuit board ground for proper thermal performance.
500mVp-p MIN
900mVp-p MAX
1000mVp-p MIN
1800mVp-p MAX
V
OUT
+
V
OUT
-
(V
OUT
+) - (V
OUT
-)
Figure 1. Example of Output Signal with Matched Output Loads
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MAX3772CEE+ 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
MAX3772CEE+T 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
MAX3772CEE-T 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
MAX3772CEE-TG075 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:
MAX3772EVKIT 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube