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參數(shù)資料
| 型號(hào)： | MAX3747EUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP LIMITING SFP 10-UMAX |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 限幅放大器 |
| 應(yīng)用： | 數(shù)據(jù)量化器，光學(xué)接收器 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
MAX3747A/MAX3747B
155Mbps to 3.2Gbps, Low-Power SFP
Limiting Amplifiers
3
Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.97V to +3.63V, CML output load is 50 to VCC, TA = -40°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C,
unless otherwise specified.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input-Referred Noise
VIN = 4mVP-P (Note 4)
120
150
VRMS
Low-Frequency Cutoff
6.4
kHz
LOS Hysteresis
10log(VDEASSERT / VASSERT) (Note 4)
1.25
dB
MAX3747A (Notes 4, 8)
LOS Assert/Deassert Time
MAX3747B (Notes 4, 8, 9)
2.3
40.0
s
Low LOS Assert Level
VTH = -1.3V (Notes 4, 10)
2.5
4.1
5.9
mVP-P
Low LOS Deassert Level
VTH = -1.3V (Notes 4, 10)
6.2
9.3
mVP-P
Medium LOS Assert Level
VTH = -0.68V (Notes 4, 10)
22.0
29.0
36.0
mVP-P
Medium LOS Deassert Level
VTH = -0.68V (Notes 4, 10)
44.8
62.0
mVP-P
High LOS Assert Level
VTH = -0.114V (Notes 4, 10)
36.0
53.7
63.6
mVP-P
High LOS Deassert Level
VTH = -0.114V (Notes 4, 10)
86.0
115
mVP-P
TTL/CMOS I/O
VREF Voltage
VREF
VCC -
1.35
VCC -
1.3V
VCC -
1.19
V
LOS Output High Voltage
VOH
RLOS = 4.7k to 10k to VCC_HOST (3V)
2.4
V
LOS Output Low Voltage
VOL
RLOS = 4.7k to 10k to VCC_HOST (3.6V)
0.4
V
DISABLE Input High
VIH
2.0
V
DISABLE Input Low
VIL
0.8
V
DISABLE Input Current
RLOS = 4.7k to 10k to VCC_HOST
10
A
Note 1:
The data-input transition time is controlled by a 4th-order Bessel filter with f-3dB = 0.75 x 2.667GHz for all data rates of
2.667Gbps and below. The f-3db = 0.75 x 3.2GHz for a data rate of 3.2Gbps.
Note 2:
Supply current is measured with unterminated outputs or with AC-coupled output termination (see Figure 1).
Note 3:
Between sensitivity and overload, all AC specifications are met and the output is 0.95 x limited output amplitude.
Note 4:
Guaranteed by design and characterization.
Note 5:
The deterministic jitter (DJ) caused by the input filter is not included in the DJ generation specification.
Note 6:
The PRBS 223 - 1 equivalent pattern consists of a K28.5 pattern plus 240 ones plus K28.5 pattern plus 240 zeros.
Note 7:
Random jitter was measured without using a filter at the input.
Note 8:
The signal at the input is switched between two amplitudes, Signal_ON and Signal_OFF, as shown in Figure 2A.
Note 9:
The signal at the input is switched between 1.2VP-P and Signal_OFF as shown in Figure 2B.
Note 10: VTH is the voltage at pin 5 referenced to VCC (see Figure 5).
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