參數資料
型號: MAX3741ETE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 其它接口
英文描述: Full-Duplex LVDM Transceiver 14-SOIC -40 to 85
中文描述: SPECIALTY INTERFACE CIRCUIT, QCC16
封裝: 3 X 3 MM, 0.80 MM HEIGHT, MO-220WEED-2, TQFN-16
文件頁數: 6/10頁
文件大?。?/td> 531K
代理商: MAX3741ETE
M
Detailed Description
The MAX3741 contains a bias generator and a laser
modulator with optional peaking compensation.
Bias Generator
Figure 1 shows the bias generator circuitry that con-
tains a bandgap voltage reference, current mirror, and
bias monitor. The bias current output to the laser is
controlled with the R
BIASSET
resistor. For appropriate
R
BIASSET
values, see the Bias Current vs. R
BIASSET
graph in the
Typical Operating Characteristics
.
The BIASMON output provides a current proportional to
the laser bias current given by:
I
BIASMON
= I
BIAS
/ 9
Modulation Circuit
The modulation circuitry consists of an input buffer, a cur-
rent mirror, and a high-speed current switch (Figure 2).
The modulators drive up to 15mA of modulation into a
50
VCSEL load.
The amplitude of the modulation current is set with resis-
tor at MODSET (R
MODSET
). For appropriate R
MODSET
values, see the I
MOD
vs. R
MODSET
graph in the
Typical
Operating Characteristics
. Figure 3 shows a simplified
diagram of the MAX3741 output stage.
Input Termination
The MAX3741 data inputs are SFP MSA compatible.
On-chip 100
differential input impedance is provided
for optimal termination (Figure 4). The MAX3741 inputs
self-bias to the proper operating point to accommodate
AC-coupling.
Applications Information
VCSEL Selection
Select a communications-grade VCSEL with a rise time
of 260ps or better for 1.25Gbps or 130ps or better for
2.5Gbps applications.
Use a high-efficiency VCSEL that requires low modula-
tion current and generates a low voltage swing. Trim the
leads to reduce VCSEL package inductance. The typical
package leads have inductance of 25nH per inch
(1nH/mm). This inductance causes a large voltage swing
across the VCSEL. A compensation filter network can be
used to reduce ringing, edge speed, and voltage swing.
See the
Designing the Laser-Compensation Filter
Network
section for more information.
Layout Considerations
To minimize inductance, keep the connections between
the MAX3741 output pins and VCSEL as close as pos-
sible. Use good high-frequency layout techniques and
multiple-layer boards with uninterrupted ground planes
to minimize EMI and crosstalk.
3.2Gbps Compact SFP VCSEL Driver
6
_______________________________________________________________________________________
Functional Diagram
TX_DISABLE
V
CC
IN+
IN-
OUT-
OUT+
MODULATION-CURRENT
GENERATOR
BIAS
GENERATOR
ENABLE
ENABLE
100
LASER
MODULATOR
PEAKING
CONTROL
BIAS
BIASSET
BIASMON
PEAKSET
MODSET
MAX3741
R
OUT
R
OUT
BIASSET
0.8V
CURRENT
AMPLIFIER
ENABLE
200
R
BIASSET
BIAS GENERATOR
R
BIASMON
BIASMON
FERRITE
BEAD
BIAS
I
BIAS
40
I
BIAS
9
MAX3741
Figure 1. Bias Generator
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