參數(shù)資料
型號(hào): MAX3625BEUG+T
廠商: Maxim Integrated Products
文件頁數(shù): 3/10頁
文件大?。?/td> 0K
描述: IC CLOCK GENERATOR PREC 24TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 時(shí)鐘發(fā)生器,扇出配送,多路復(fù)用器
PLL: 帶旁路
輸入: LVCMOS,晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:3
差分 - 輸入:輸出: 無/是
頻率 - 最大: 318.75MHz
除法器/乘法器: 是/是
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm)裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TSSOP 裸露焊盤
包裝: 帶卷 (TR)
MAX3625B
Low-Jitter, Precision Clock
Generator with Three Outputs
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25°C, unless other-
wise noted.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage Range VCC, VCCA,
VCCO_A, VCCO_B ..............................................-0.3V to +4.0V
Voltage Range at REF_IN, IN_SEL,
FB_SEL, SELA[1:0], SELB[1:0],
QA_OE, QB_OE, MR, BYPASS ..............-0.3V to (VCC + 0.3V)
Voltage Range at X_IN ..........................................-0.3V to +1.2V
Voltage Range at X_OUT ............................-0.3V to (VCC - 0.6V)
Current into QA, QA, QB0, QB0, QB1, QB1 .....................-56mA
Continuous Power Dissipation (TA = +70
°C)
24-Pin TSSOP (derate 26.7mW/
°C above +70°C) ..2133.3mW
Operating Junction Temperature Range ...........-55°C to +150°C
Storage Temperature Range .............................-65°C to +160°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN_SEL = high
72
98
Power-Supply Current (Note 3)
ICC
IN_SEL = low
74
mA
CONTROL INPUT CHARACTERISTICS
(SELA[1:0], SELB[1:0], FB_SEL, IN_SEL, QA_OE, QB_OE, MR,
BYPASS Pins)
Input Capacitance
CIN
2
pF
Input Pulldown Resistor
RPULLDOWN Pins MR, FB_SEL
75
k
Input Logic Bias Resistor
RBIAS
Pins SELA[1:0], SELB[1:0]
50
k
Input Pullup Resistor
RPULLUP
Pins QA_OE, QB_OE, IN_SEL,
BYPASS
75
k
LVPECL OUTPUTS (QA,
QA, QB0, QB0, QB1, QB1 Pins)
Output High Voltage
VOH
VCC -
1.18
VCC -
0.98
VCC -
0.83
V
Output Low Voltage
VOL
VCC -
1.90
VCC -
1.7
VCC -
1.55
V
Peak-to-Peak Output-Voltage
Swing (Single-Ended)
(Note 2)
0.6
0.72
0.9
VP-P
Clock Output Rise/Fall Time
20% to 80% (Note 2)
200
350
600
ps
PLL enabled
48
50
52
Output Duty-Cycle Distortion
PLL bypassed (Note 4)
45
50
55
%
LVCMOS/LVTTL INPUTS
(SELA[1:0], SELB[1:0], FB_SEL, IN_SEL, QA_OE, QB_OE, MR,
BYPASS Pins)
Input-Voltage High
VIH
2.0
V
Input-Voltage Low
VIL
0.8
V
Input High Current
IIH
VIN = VCC
80
μA
Input Low Current
IIL
VIN = 0V
-80
μA
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