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參數(shù)資料
| 型號： | MAX3454EETE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX USB ESD-PROT 16TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | USB 2.0 |
| 電源電壓： | 1.65 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TQFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
MAX3453E–MAX3456E
±15kV ESD-Protected USB Transceivers
14
______________________________________________________________________________________
ESD Protection
D+ and D- possess extra protection against static elec-
tricity to protect the devices up to
±15kV. The ESD
structures withstand high ESD in all operating modes:
normal operation, suspend mode, and powered down.
D+ and D- provide protection to the following limits:
±15kV using the Human Body Model
±8kV using the Contact Discharge method specified
in IEC 61000-4-2
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 7 shows the Human Body Model and Figure 8
shows the current waveform generated when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which then discharges into the test device through
a 1.5k
resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. It does not specifi-
cally refer to integrated circuits. The major difference
between tests done using the Human Body Model and
IEC 61000-4-2 is a higher peak current in IEC 61000-4-
2, due to lower series resistance. Hence, the ESD with-
stand voltage measured to IEC 61000-4-2 generally is
lower than that measured using the Human Body
Model. Figure 9 shows the IEC 61000-4-2 model. The
Contact Discharge method connects the probe to the
device before the probe is charged.
Machine Model
The Machine Model for ESD tests all connections using
a 200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. All pins require this protection during
manufacturing, not just inputs and outputs. After PC
board assembly, the Machine Model is less relevant to
I/O ports.
Chip Information
TRANSISTOR COUNT: 873
PROCESS: BiCMOS
Figure 8. Human Body Model Current Waveform
IP 100%
90%
36.8%
tRL
TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
10%
0
AMPERES
Figure 7. Human Body ESD Test Models
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
RC
1M
RD
1.5k
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 9. IEC 61000-4-2 ESD Test Model
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
RC
50M
to 100M
RD
330
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
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