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參數資料
| 型號： | MAX3420EECJ+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 19/22頁 |
| 文件大小： | 0K |
| 描述： | IC USB PERIPH CONTROLLER 32TQFP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 控制器類型： | USB 外設控制器 |
| 接口： | USB/串行 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 15mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應商設備封裝： | 32-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 配用： | MAX3420EEVKIT-2+-ND - EVAL KIT FOR MAX3420E |
The first five registers (R0–R4) access endpoint FIFOs.
To access a FIFO, an initial command byte sets the
register address and then consecutive reads or writes
keep the same register address to access subsequent
FIFO bytes.
The remaining registers (R5–R20) control the operation
of the MAX3420E. Once a register address above R4 is
set in the command byte, successive byte reads or
writes in the same SPI access cycle (SS low) increment
the register address after every byte read or written. This
incrementing operation continues until R20 is accessed.
Subsequent byte reads or writes continue to access
R20. Note that this autoincrementing action stops with
the next SPI cycle, which establishes a new register
address. Addressing beyond R20 is ignored.
The MAX3420E register map is depicted in Table 1. For
a complete description of all register contents, please
refer to the
MAX3420E Programming Guide.
USB Peripheral Controller
with SPI Interface
Table 1. MAX3420E Register Map
REG
NAME
b7
b6
b5
b4
b3
b2
b1
b0
acc
R0
EP0FIFO
b7b6b5b4b3b2b1b0RSC
R1
EP1OUTFIFO
b7b6b5b4b3b2b1b0RSC
R2
EP2INFIFO
b7b6b5b4b3b2b1b0RSC
R3
EP3INFIFO
b7b6b5b4b3b2b1b0RSC
R4
SUDFIFO
b7b6b5b4b3b2b1b0RSC
R5
EP0BC
0b6b5b4b3b2b1b0RSC
R6
EP1OUTBC
0b6b5b4b3b2b1b0RSC
R7
EP2INBC
0b6b5b4b3b2b1b0RSC
R8
EP3INBC
0b6b5b4b3b2b1b0RSC
R9
EPSTALLS
0ACKSTAT
STLSTAT
STLEP3IN
STLEP2IN
STLEP1OUTSTLEP0OUTSTLEP0IN
RSC
R10
CLRTOGS
EP3DISAB
EP2DISAB
EP1DISAB
CTGEP3IN
CTGEP2IN CTGEP1OUT0
0
RSC
R11
EPIRQ
00
SUDAVIRQ
IN3BAVIRQ IN2BAVIRQ OUT1DAVIRQ OUT0DAVIRQ IN0BAVIRQ
RC
R12
EPIEN
00
SUDAVIE
IN3BAVIE
IN2BAVIE
OUT1DAVIE
OUT0DAVIE
IN0BAVIE
RSC
R13
USBIRQ
URESDNIRQ VBUSIRQ NOVBUSIRQ
SUSPIRQ
URESIRQ
BUSACTIRQ
RWUDNIRQ OSCOKIRQ RC
R14
USBIEN
URESDNIE
VBUSIE
NOVBUSIE
SUSPIE
URESIE
BUSACTIE
RWUDNIE
OSCOKIE
RSC
R15
USBCTL
HOSCSTEN
VBGATE
CHIPRES
PWRDOWN CONNECTSIGRWU
0
RSC
R16
CPUCTL
00
0
00
0
IE
RSC
R17
PINCTL
EP3INAK
EP2INAK
EP0INAK
FDUPSPIINTLEVELPOSINTGPXBGPXARSC
R18
REVISION
00
0
00
1
0
R
R19
FNADDR
0b6b5b4b3b2b1b0R
R20
IOPINS
GPIN3GPIN2GPIN1GPIN0GPOUT3
GPOUT2
GPOUT1
GPOUT0
RSC
Note: The acc (access) column indicates how the SPI master can access the register.
R = read, RC = read or clear, RSC = read, set, or clear.
Writing to an R register (read only) has no effect.
Writing a 1 to an RC bit (read or clear) clears the bit.
Writing a zero to an RC bit has no effect.
MAX3420E
6
Maxim Integrated
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MAX3420EETG | 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX3420EETG+ | 功能描述:外圍驅動器與原件 - PCI USB Peripheral Controller w/SPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX3420EETG+T | 功能描述:外圍驅動器與原件 - PCI USB Peripheral Controller w/SPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX3420EETG-T | 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX3420EEVKIT | 制造商:Maxim Integrated Products 功能描述:MAX3420E EVAL KIT - Bulk |
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