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參數(shù)資料
| 型號： | MAX3325EAI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX DUAL RS232 LCD 28-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 2/2 |
| 規(guī)程： | RS232 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
MAX3325
3V Dual RS-232 Transceiver with
LCD Supply and Contrast Controller
6
_______________________________________________________________________________________
NAME
FUNCTION
1
C2+
Positive Terminal of Voltage-Inverting Charge-Pump Capacitor. Connect C2+ to C2- with a 0.22F capacitor.
2
C2-
Negative Terminal of Voltage-Inverting Charge-Pump Capacitor. Connect C2- to C2+ with a 0.22F capacitor.
PIN
3
V-
Output of Negative Charge Pump. Bypass V- to GND with a 0.22F capacitor.
4, 5
R_IN
RS-232 Receiver Inputs
10
TEMP
Output of Temperature Sensor. Connect TEMP to FB with a series resistor to compensate LCD contrast for
changing temperature. Bypass TEMP with a 0.22F capacitor to GND.
9
LCD
Output of Negative Regulator. Connect LCD to FB with a series resistor. Bypass with a 0.47F capacitor to
GND.
8
VL
Supply Input for Receiver Outputs. Connect VL to the system logic supply voltage.
6, 7
R_OUT
TTL/CMOS Receiver Outputs
15
UP
DAC Adjust Input. A falling edge on
UP increments the internal 6-bit DAC counter.
14
DAC
Output of Internal 6-Bit DAC. Connect DAC to FB with a series resistor to adjust LCD voltage.
13
REF+
Output of Positive Reference, +1.2V. Bypass REF+ with a 0.22F capacitor to GND.
12
FB
Feedback Input for Negative Regulator. Regulates when FB is at zero (0).
11
REF-
Output of Negative Reference, -1.2V. Bypass REF- with a 0.22F capacitor to GND.
Pin Description
16
DOWN
DAC Adjust Input. A falling edge on
DOWN decrements the internal 6-bit DAC counter.
17
SDLCD
Active-Low Shutdown-Control Input for Both Regulators, References, DAC, and Temperature Sensors. Drive
SDLCD low to disable all analog circuitry. Drive high to enable the analog circuitry.
26
VDD
+3.0V to +3.6V Supply Voltage. Bypass VDD with a 0.22F capacitor to GND.
25
GND
Ground
24
C1-
Negative Terminal of Voltage-Doubling Charge-Pump Capacitor. Connect C1- to C1+ with a 0.22F capacitor.
18
SD232
Active-Low Shutdown-Control Input for Transmitter Outputs. Drive
SD232 low to disable the RS-232
transmitters. Drive high to enable the transmitters.
23
REG
Output of Positive Regulator. Bypass REG with a 4.7F capacitor to GND.
21, 22
T_OUT
RS-232 Transmitter Outputs
19, 20
T_IN
TTL/CMOS Transmitter Inputs
28
C1+
Positive Terminal of Voltage-Doubling Charge-Pump Capacitor. Connect C1+ to C1- with a 0.22F capacitor.
27
V+
Output of Positive Charge Pump. Bypass V+ to VDD with a 0.22F capacitor.
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