參數(shù)資料
型號: MAX3301EEBA-T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 通用總線功能
英文描述: CLAMP
中文描述: LINE TRANSCEIVER, PBGA25
封裝: 5 X 5 MM, UCSP-25
文件頁數(shù): 23/33頁
文件大?。?/td> 935K
代理商: MAX3301EEBA-T
M
USB On-the-Go Transceiver and Charge Pump
______________________________________________________________________________________
23
BIT NUMBER
SYMBOL
OPERATION
VALUE AT
POWER-UP
0
speed
S et to 0 for l ow sp eed ( 1.5M b p s) m od e. S et to 1 for ful sp eed ( 12M b p s) m od e. Thi s
b chang es the d ata r ate onl y i sp d _susp _ctl = 1 i n sp eci al uncti on r eg ster 1.
0
1
suspend
Set to 0 for normal operating mode. Set to 1 for suspend mode. This bit changes
the operating mode only if spd_susp_ctl = 1 in sp eci al uncti on r eg ster 1.
0
2
3
dat_se0
Set to 0 for VP_VM USB mode. Set to 1 for DAT_SE0 USB mode.
Not used.
0
0
4
bdis_acon_en
Enables the transceiver (when configured as an A device) to connect its pullup
resistor if the B device disconnect is detected during HNP. Set to 0 to disable this
feature. Set to 1 to enable this feature.
0
5
oe_int_en
Set to 0 to disable the interrupt output circuitry of
OE
/
INT
. Set to 1 to enable the
interrupt output circuitry of
OE
/
INT
.
0
6
uart_en
Set to 0 to disable UART mode. Set to 1 to enable UART mode. This bit overrides
the settings of dminus_dir, dplus_dir, and gp_en bits.
0
7
Not used.
0
Table 7. Control Register 1 Description (Write to Address 04h to Set, Write to Address
05h to Clear)
BIT NUMBER
SYMBOL
OPERATION
VALUE AT
POWER-UP
0
1
dp_pullup
dm_pullup
S et to 0 to d sconnect the p ul up resi stor to D+ Set to 1 to connect the pul up r esi stor to D +.
S et to 0 to d sconnect the p ul up r esi stor to D S et to 1 to connect the p ul up r esi stor to D
0
0
2
dp_pulldown
Set to 0 to disconnect the pulldown resistor to D+. Set to 1 to connect the pulldown
resistor to D+.
1
3
dm_pulldown
Set to 0 to disconnect the pulldown resistor to D-. Set to 1 to connect the pulldown
resistor to D-.
1
4
5
id_pulldown
vbus_drv
Set to 0 to allow ID_IN to float. Set to 1 to connect ID_IN to GND.
S et to 0 to tur n V
B U S
off. S et to 1 to d ve V
B U S
thr oug h a l ow i m p ed ance ( see N ote 8)
Set to 0 to disconnect the V
BUS
discharge resistor. Set to 1 to connect the V
BUS
discharge resistor (see Note 8).
0
0
6
vbus_dischrg
0
7
vbus_chrg
Set to 0 to disconnect the V
BUS
charge resistor. Set to 1 to connect the V
BUS
charge resistor (see Note 8).
0
Table 8. Control Register 2 Description (Write to Address 06h to Set, Write to Address
07h to Clear)
Note 8:
To prevent a high-current state where the transceiver is both sourcing current to VBUSand sinking current from VBUS, the fol-
lowing logic is used to set bits 5, 6, and 7 of control register 2:
Setting vbus_drv clears vbus_dischrg and vbus_chrg
Setting vbus_dischrg clears vbus_drv and vbus_chrg, unless vbus_drv is set with the same command, in which case vbus_drv
clears the other bits
Setting vbus_chrg clears vbus_drv and vbus_dischrg, unless either of these bits are set with the same command, as shown in Table 9
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