- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384662 > MAX3274 (Maxim Integrated Products, Inc.) 32-Bit Digital Signal Controller with Flash 100-BGA MICROSTAR -40 to 85 PDF資料下載
參數(shù)資料
| 型號(hào)： | MAX3274 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 32-Bit Digital Signal Controller with Flash 100-BGA MICROSTAR -40 to 85 |
| 中文描述： | 雙速率、光纖通道限幅放大器 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 477K |
| 代理商： | MAX3274 |
Detailed Description
Figure 2 is a functional diagram of the MAX3274 limit-
ing amplifier. Typical gain is 46dB. A linear input drives
a bandwidth selector. An offset correction loop with
lowpass filtering ensures low deterministic jitter. An
integrated RMS signal detector monitors for loss-of-sig-
nal conditions. The output buffer provides a limited
CML output signal.
Input Buffer
The MAX3274 input buffer (Figure 3) provides a 100
input impedance between IN+ and IN-. DC-
coupling the inputs is not recommended; doing so pre-
vents proper functioning of DC offset correction circuitry.
Signal Detect and Loss-of-Signal
An RMS signal detector looks at the signal from the
input buffer and compares it to a threshold set by a
resistor at pin TH. The status of the signal-detect infor-
mation appears at the LOS outputs. These are open-
collector outputs and require external pullup resistors
connected to the host power supply. The LOS outputs
are high impedance when the power supply to the
MAX3274 is 0V. ESD protection on the dual-rate limiting
amplifiers
’
LOS outputs do not forward-bias when the
power supply of the MAX3274 is 0V or below the host
power supply.
Offset Correction
A low-frequency feedback loop is integrated into the
limiting amplifiers to reduce input offset and thereby
minimize duty-cycle distortion. For proper operation,
the input must be externally AC-coupled. The offset
correction circuit has been optimized for the Fibre
Channel character set, disparity rules, and 8b/10b data
encoding. This dictates an average data input mark
density of 50% and a maximum run length of five con-
secutive identical digits (CID) or bits.
CML Output Buffer
The MAX3274 CML outputs (Figure 4) provide high toler-
ance to impedance mismatches and inductive connec-
tors. The output current is approximately 24mA. The
squelch function is enabled when SQUELCH is set to a
TTL-high level or connected to V
CC
. The squelch func-
tion holds OUT+ and OUT- at a static voltage when the
input signal level drops below the loss-of-signal thresh-
old. The output buffer can be AC- or DC-coupled to the
load. For DC operation, the load must be terminated to
V
CC
of the MAX3274.
Design Procedure
Programming the LOS Assert Threshold
External resistor R
TH
programs the loss-of-signal
threshold. See the LOS Threshold vs. R
TH
graph in the
Typical Operating Characteristics
section. R
TH
can be
estimated by R
TH
= 15 / V
TH
, where V
TH
is the peak-to-
peak differential input assert level.
Selecting the AC-Coupling Capacitors
The input and output AC-coupling capacitors (C
IN
,
C
OUT
) should be selected to minimize the receiver
’
s
deterministic jitter. Lowering the low-frequency cutoff
reduces deterministic jitter. The low-frequency cutoff
can be determined by:
where R
L
is the single-ended load impedance and R
S
is the single-ended source impedance. C
IN
, C
OUT
=
0.1μF is recommended.
Applications Information
Optical Hysteresis
In an optical receiver, the electrical power change at
the limiting amplifier is 2 times the optical power
change. For example, if a receiver
’
s optical input power
(
χ
) increases by a factor of 2, and the preamplifier is
linear, then the voltage input to the limiting amplifier
also increases by a factor of 2. The optical power
change is 10log (2
χ
/
χ
) = 10log(2) = 3dB. At the limiting
amplifier, the electrical power change is:
The typical voltage hysteresis for the MAX3274 is 6dB.
This provides an optical hysteresis of 3dB.
10
2
10
2
20
2
6
2
2
2
log
/
/
log
log
V
R
V
R
dB
IN
IN
IN
IN
(
)
=
( )
=
( )
=
f
C
R
(
R
C
L
S
=
×
×
+
)
1
2
π
M
Dual-Rate Fibre Channel Limiting Amplifier
_______________________________________________________________________________________
7
50
V
DEASSERT
V
ASSERT
V
IN
LOS, LOS
OUTPUTS
50
LOS RESPONSE TIME
Figure 1. LOS Response Time
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX327CPE | Quad, SPST, Ultra-Low Leakage, CMOS Analog Switches |
| MAX327CSE | Quad, SPST, Ultra-Low Leakage, CMOS Analog Switches |
| MAX327EEE | 32-Bit Digital Signal Controller with Flash 100-LQFP -40 to 85 |
| MAX327EPE | 32-Bit Digital Signal Controller with Flash 100-LQFP -40 to 125 |
| MAX327ESE | 32-Bit Digital Signal Controller with Flash 100-LQFP -40 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3274UGE | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX3277EVKIT | 制造商:Maxim Integrated Products 功能描述:LOW-NOISE, FIBRE CHANNEL TRANSIMPED - Boxed Product (Development Kits) |
| MAX3277U/D | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| MAX327C/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX327CEE | 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。